Product OverviewFeaturesApplications1 ESP32-H2 Series Comparison1.1 Nomenclature1.2 Comparison2 Pins2.1 Pin Layout2.2 Pin Overview2.3 IO Pins2.3.1 IO MUX Functions2.3.2 Analog Functions2.3.3 Restrictions for GPIOs2.4 Analog Pins2.5 Power Supply2.5.1 Power Pins2.5.2 Power Scheme2.5.3 Chip Power-up and Reset3 Boot Configurations3.1 Chip Boot Mode Control3.2 ROM Messages Printing Control3.3 JTAG Signal Source Control4 Functional Description4.1 System4.1.1 Microprocessor and Master4.1.2 Memory Organization4.1.3 System Components4.1.4 Cryptography and Security Components4.2 Peripherals4.2.1 Connectivity Interfaces4.2.2 Analog Signal Processing4.3 Wireless Communication4.3.1 Radio4.3.2 Bluetooth LE4.3.3 802.15.45 Electrical Characteristics5.1 Absolute Maximum Ratings5.2 Recommended Operating Conditions5.3 DC Characteristics (3.3 V, 25 °C)5.4 ADC Characteristics5.5 Current Consumption5.5.1 RF Current Consumption in Active Mode5.5.2 Current Consumption in Other Modes5.6 Reliability6 RF Characteristics6.1 Bluetooth LE Radio6.1.1 Bluetooth LE RF Transmitter (TX) Characteristics6.1.2 Bluetooth LE RF Receiver (RX) Characteristics6.2 802.15.4 Radio6.2.1 802.15.4 RF Transmitter (TX) Characteristics6.2.2 802.15.4 RF Receiver (RX) Characteristics7 PackagingRelated Documentation and ResourcesAppendix A – ESP32-H2 Consolidated Pin OverviewDatasheet VersioningRevision History ESP32-H2 SeriesDatasheet Version 1.2RISC-V 32-bit single-core microprocessorBluetooth®Low Energy and IEEE 802.15.43.3 V flash in the chip’s package19 GPIOsQFN32 (4×4 mm) PackageIncluding:ESP32-H2FH2SESP32-H2FH4Swww.espressif.com Product OverviewESP32-H2 is a low-power MCU-based system on a chip (SoC) with integrated 2.4 GHz Bluetooth®Low Energy(Bluetooth LE) and 802.15.4. It consists of an RISC-V 32-bit microprocessor, a Bluetooth LE baseband, an802.15.4 baseband, RF module, and numerous peripherals.The functional block diagram of the SoC is shown below.Espressif ESP32-H2 Bluetooth® Low Energy + IEEE 802.15.4 SoCPower consumptionNormalLow power consumption components capable of working in Deep-sleep modeWireless Digital Circuits802.15.4 MAC 802.15.4 BasebandBluetooth LE Link ControllerBluetooth LE BasebandSecurityFlash EncryptionRSA RNGDigital SignatureSHA AESHMACSecure BootLP SystemLP MemoryPMUPeripheralsUSB Serial/JTAGGPIOUARTTWAI®General-purpose TimersI2SI2CPulse CounterLED PWMAnalog PAD Voltage ComparatorSPI0/1RMTSPI2ADCSystem TimerLP GPIORTC Watchdog TimerGDMAeFuseControllerEvent Task MatrixMCPWMRTC TimerSuper WatchdogRF2.4 GHz Balun +Switch2.4 GHzReceiver2.4 GHzTransmitterRF SynthesizerFast RC Oscillator32 MHz XTAL OSCPLLCPU and MemoryRISC-V 32-bit MicroprocessorJTAGCacheROMSRAMInterruptMatrixPermission ControlPARLIOMain System Watchdog TimersTEEECCECDSATemperature SensorBrown-out DetectorESP32-H2 Functional Block DiagramFor more information on power consumption, see Section 4.1.3.6 Power Management Unit.Espressif Systems 2Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 FeaturesBluetooth®• Bluetooth Low Energy (Bluetooth 5.3 certified)• Bluetooth mesh• Bluetooth Low Energy long range (Coded PHY, 125 Kbps and 500 Kbps)• Bluetooth Low Energy high speed (2 Mbps)• Bluetooth Low Energy advertising extensions and multiple advertising sets• Simultaneous operation of Broadcaster, Observer, Central, and Peripheral devices• Multiple connections• LE power control802.15.4• IEEE Standard 802.15.4-2015 compliant• Supports 250 Kbps data rate in 2.4 GHz band and OQPSK PHY• Supports Thread• Supports Zigbee 3.0• Supports Matter• Supports other application-layer protocols (HomeKit, MQTT, etc)CPU and Memory• 32-bit RISC-V single-core processor• Clock speed: up to 96 MHz• CoreMark®score:– at 96 MHz: 303.38 CoreMark; 3.16 CoreMark/MHz• Four-stage pipeline• 128 KB ROM• 320 KB SRAM• 4 KB LP Memory• 2 MB or 4 MB in-package flash• 16 KB cache• Supported SPI protocols: SPI, Dual SPI, Quad SPI, and QPI interfaces that allow connection to flash andother SPI devices• Flash in-Circuit Programming (ICP)Espressif Systems 3Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 Advanced Peripheral Interfaces• 19 programmable GPIOs– Three strapping pins: GPIO8, GPIO9, and GPIO25• Digital interfaces:– Two SPI ports for communication with flash– General-purpose SPI port– Two UART– Two I2C– I2S– RMT, with up to 2 transmit channels and 2 receive channels– Pulse count controller– LED PWM controller, up to 6 channels– USB Serial/JTAG controller– Motor Control PWM (MCPWM)– General DMA controller, with 3 transmit channels and 3 receive channels– TWAI®controller, compatible with ISO 11898-1 (CAN Specification 2.0)– SoC event task matrix (ETM)– Parallel IO (PARLIO) controller• Analog interfaces:– 12-bit SAR ADC, up to 5 channels– Temperature sensor• Timers:– Two 54-bit general-purpose timers– 52-bit system timer– Three watchdog timersPower Management• Fine-resolution power control through a selection of clock frequency, duty cycle, RF operating modes, andindividual power control of internal components• Four power modes designed for typical scenarios: Active, Modem-sleep, Light-sleep, Deep-sleep• Power consumption in Deep-sleep mode is 7 µA• LP memory remains powered on in Deep-sleep modeEspressif Systems 4Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 Security• Secure boot - ensuring firmware integrity• Flash encryption - memory encryption and decryption• 4096-bit OTP, up to 1792 bits for users• Cryptographic hardware acceleration:– AES-128/256 (FIPS PUB 197)* ECB/CBC/CFB/OFB/CTR (FIPS PUB 800-38A)– SHA Accelerator (FIPS PUB 180-4)– RSA Accelerator– ECC Accelerator– ECDSA (Elliptic Curve Digital Signature Algorithm)– HMAC– Digital signature• Access permission management (APM)• Random Number Generator (RNG)• Power Glitch DetectorRF Module• Antenna switches, RF balun, power amplifier, low-noise receive amplifier• Up to -106.5 dBm of sensitivity for Bluetooth LE receiver (125 Kbps)• Up to -102.5 dBm of sensitivity for 802.15.4 receiver (250 Kbps)ApplicationsWith low power consumption, ESP32-H2 is an ideal choice for IoT devices in the following areas:• Smart Home• Industrial Automation• Health Care• Consumer Electronics• Smart Agriculture• Matter Solutions• Service Robot• Generic Low-power IoT Sensor Hubs• Generic Low-power IoT Data LoggersEspressif Systems 5Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 ContentsNote:Check the link or the QR code to make sure that you use the latest version of this document:https://www.espressif.com/documentation/esp32-h2_datasheet_en.pdfContentsProduct Overview 2Features 3Applications 51 ESP32-H2 Series Comparison 111.1 Nomenclature 111.2 Comparison 112 Pins 122.1 Pin Layout 122.2 Pin Overview 132.3 IO Pins 152.3.1 IO MUX Functions 152.3.2 Analog Functions 172.3.3 Restrictions for GPIOs 182.4 Analog Pins 192.5 Power Supply 202.5.1 Power Pins 202.5.2 Power Scheme 202.5.3 Chip Power-up and Reset 213 Boot Configurations 223.1 Chip Boot Mode Control 233.2 ROM Messages Printing Control 243.3 JTAG Signal Source Control 244 Functional Description 264.1 System 264.1.1 Microprocessor and Master 264.1.1.1 ESP-RISC-V CPU 264.1.1.2 RISC-V Trace Encoder 274.1.1.3 GDMA Controller 274.1.2 Memory Organization 284.1.2.1 Internal Memory 284.1.2.2 External Memory 294.1.2.3 eFuse Controller 29Espressif Systems 6Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 Contents4.1.3 System Components 304.1.3.1 IO MUX and GPIO Matrix 304.1.3.2 Reset 304.1.3.3 Clock 314.1.3.4 Interrupt Matrix 314.1.3.5 Event Task Matrix 324.1.3.6 Power Management Unit 324.1.3.7 System Timer 324.1.3.8 Timer Groups 334.1.3.9 Watchdog Timers 334.1.3.10 Permission Control 344.1.3.11 System Registers 344.1.3.12 Debug Assistant 344.1.4 Cryptography and Security Components 354.1.4.1 AES Accelerator 354.1.4.2 ECC Accelerator 354.1.4.3 HMAC Accelerator 364.1.4.4 RSA Accelerator 364.1.4.5 SHA Accelerator 374.1.4.6 Digital Signature 374.1.4.7 Elliptic Curve Digital Signature Algorithm (ECDSA) 374.1.4.8 External Memory Encryption and Decryption 384.1.4.9 Random Number Generator 384.1.4.10 Power Glitch Detector 384.1.4.11 Secure Boot 394.2 Peripherals 404.2.1 Connectivity Interfaces 404.2.1.1 UART Controller 404.2.1.2 SPI Controller 404.2.1.3 I2C Controller 414.2.1.4 I2S Controller 424.2.1.5 Pulse Count Controller 434.2.1.6 USB Serial/JTAG Controller 434.2.1.7 Two-wire Automotive Interface 444.2.1.8 LED PWM Controller 444.2.1.9 Motor Control PWM 454.2.1.10 Remote Control Peripheral 464.2.1.11 Parallel IO Controller 474.2.2 Analog Signal Processing 474.2.2.1 SAR ADC 474.2.2.2 Temperature Sensor 484.2.2.3 Analog PAD Voltage Comparator 484.3 Wireless Communication 504.3.1 Radio 504.3.1.1 2.4 GHz Receiver 504.3.1.2 2.4 GHz Transmitter 50Espressif Systems 7Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 Contents4.3.1.3 Clock Generator 504.3.2 Bluetooth LE 504.3.2.1 Bluetooth LE PHY 504.3.2.2 Bluetooth LE Link Controller 514.3.3 802.15.4 514.3.3.1 802.15.4 PHY 514.3.3.2 802.15.4 MAC 515 Electrical Characteristics 535.1 Absolute Maximum Ratings 535.2 Recommended Operating Conditions 535.3 DC Characteristics (3.3 V, 25 °C) 535.4 ADC Characteristics 545.5 Current Consumption 555.5.1 RF Current Consumption in Active Mode 555.5.2 Current Consumption in Other Modes 555.6 Reliability 566 RF Characteristics 586.1 Bluetooth LE Radio 586.1.1 Bluetooth LE RF Transmitter (TX) Characteristics 586.1.2 Bluetooth LE RF Receiver (RX) Characteristics 606.2 802.15.4 Radio 616.2.1 802.15.4 RF Transmitter (TX) Characteristics 626.2.2 802.15.4 RF Receiver (RX) Characteristics 627 Packaging 63Related Documentation and Resources 64Appendix A – ESP32-H2 Consolidated Pin Overview 65Datasheet Versioning 66Revision History 67Espressif Systems 8Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 List of TablesList of Tables1-1 ESP32-H2 Series Comparison 112-1 Pin Overview 132-2 Peripheral Signals Routed via IO MUX 152-3 IO MUX Pin Functions 152-4 Analog Signals Routed to Analog Functions 172-5 Analog Functions 172-6 Analog Pins 192-7 Power Pins 202-8 Voltage Regulators 202-9 Description of Timing Parameters for Power-up and Reset 213-1 Default Configuration of Strapping Pins 223-2 Description of Timing Parameters for the Strapping Pins 233-3 Chip Boot Mode Control 233-4 UART0 ROM Message Printing Control 243-5 USB Serial/JTAG ROM Message Printing Control 243-6 JTAG Signal Source Control 255-1 Absolute Maximum Ratings 535-2 Recommended Operating Conditions 535-3 DC Characteristics (3.3 V, 25 °C) 535-4 ADC Characteristics 545-5 ADC Calibration Results 545-6 Bluetooth LE Current Consumption in Active Mode 555-7 802.15.4 Current Consumption in Active Mode 555-8 Current Consumption in Modem-sleep Mode 555-9 Current Consumption in Low-Power Modes 565-10 Reliability Qualifications 566-1 Bluetooth LE RF Characteristics 586-2 Bluetooth LE - Transmitter Characteristics - 1 Mbps 586-3 Bluetooth LE - Transmitter Characteristics - 2 Mbps 586-4 Bluetooth LE - Transmitter Characteristics - 125 Kbps 596-5 Bluetooth LE - Transmitter Characteristics - 500 Kbps 596-6 Bluetooth LE - Receiver Characteristics - 1 Mbps 606-7 Bluetooth LE - Receiver Characteristics - 2 Mbps 606-8 Bluetooth LE - Receiver Characteristics - 125 Kbps 616-9 Bluetooth LE - Receiver Characteristics - 500 Kbps 616-10 802.15.4 RF Characteristics 626-11 802.15.4 Transmitter Characteristics - 250 Kbps 626-12 802.15.4 Receiver Characteristics - 250 Kbps 62Espressif Systems 9Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 List of FiguresList of Figures1-1 ESP32-H2 Series Nomenclature 112-1 ESP32-H2 Pin Layout (Top View) 122-2 ESP32-H2 Power Scheme 212-3 Visualization of Timing Parameters for Power-up and Reset 213-1 Visualization of Timing Parameters for the Strapping Pins 234-1 Address Mapping Structure 287-1 QFN32 (4×4 mm) Package 63Espressif Systems 10Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 1 ESP32-H2 Series Comparison1 ESP32-H2 Series Comparison1.1 NomenclatureESP-HF H/NxIn-package flash sizeIn-package flashAmbient temperatureH: High temperatureN: Normal temperatureChip seriesSSecurity enhancedFigure 1-1. ESP32-H2 Series Nomenclature1.2 ComparisonTable 1-1. ESP32-H2 Series ComparisonOrdering Code1In-Package Flash2Ambient Temp.3SPI VoltageESP32-H2FH2S 2 MB (Quad SPI) –40∼105 °C 3.3 VESP32-H2FH4S 4 MB (Quad SPI) –40∼105 °C 3.3 V1For details on chip marking and packing, see Section 7 Packaging.2For chip variants with in-package flash (namely variants in QFN32 package),the pins allocated for communication with in-package flash are not routed out.3Ambient temperature specifies the recommended temperature range of theenvironment immediately outside an Espressif chip.Espressif Systems 11Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 2 Pins2 Pins2.1 Pin Layout12345678910111213141516ESP32-H2XTAL_32K_NXTAL_32K_PGPIO12GPO11GPIO10GPIO9GPIO8VDDPST1MTDIMTCKMTDOMTMSGPIO1GPIO0VDD3P3VDD3P3CHIP_ENVBATVDDA_PMUVDDPST2GPIO22U0RXDU0TXDGPIO251719182021222324GPIO27GPIO26VDD3P3XTAL_NXTAL_PVDD3P3ANTVDD3P3252627282930313233 GNDFigure 2-1. ESP32-H2 Pin Layout (Top View)Espressif Systems 12Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 2 Pins2.2 Pin OverviewThe ESP32-H2 chip integrates multiple peripherals that require communication with the outside world. To keepthe chip package size reasonably small, the number of available pins has to be limited. So the only way to routeall the incoming and outgoing signals is through pin multiplexing. Pin muxing is controlled via softwareprogrammable registers (see ESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix).All in all, the ESP32-H2 chip has the following types of pins:• IO pins with the following predefined sets of functions to choose from:– Each IO pin has predefined IO MUX functions – see Table 2-3 IO MUX Pin Functions– Some IO pins have predefined analog functions – see Table 2-5 Analog FunctionsPredefined functions means that each IO pin has a set of direct connections to certain signals from on-chipcomponents. During run-time, the user can configure which component signal from a predefined set toconnect to a certain pin at a certain time via memory mapped registers.• Analog pins that have exclusively-dedicated analog functions – see Table 2-6 Analog Pins• Power pins that supply power to the chip components and non-power pins – see Table 2-7 Power PinsDepending on whether can work in Deep-sleep mode or Light-sleep mode, the pins of ESP32-H2 can also bedivided into:• Digital pins (GPIO0 ~ GPIO5, GPIO22 ~ GPIO27): are unable to work in Deep-sleep mode, but can workin Light-sleep mode only if the power domain controlled by the XPD TOP does not power off.• LP pins (GPIO8 ~ GPIO14): are able to work in any chip mode.Table 2-1 Pin Overview gives an overview of all the pins. For more information, see the respective sections foreach pin type below, or Appendix A – ESP32-H2 Consolidated Pin Overview.Table 2-1. Pin OverviewPin Pin Pin Pin Providing Pin Settings3Pin Function Sets1No. Name Type Power2At Reset After Reset IO MUX Analog1 VDD3P3 Power2 VDD3P3 Power3 GPIO0 IO VDDPST1 IO MUX4 GPIO1 IO VDDPST1 IO MUX Analog5 MTMS IO VDDPST1 IE IE IO MUX Analog6 MTDO IO VDDPST1 IE IE IO MUX Analog7 MTCK IO VDDPST1 IE4IO MUX Analog8 MTDI IO VDDPST1 IE IO MUX Analog9 VDDPST1 Power10 GPIO8 IO VDDPST1 IE IE IO MUX11 GPIO9 IO VDDPST1 IE, WPU IE, WPU IO MUX12 GPIO10 IO VDDPST1 IO MUX Analog13 GPIO11 IO VDDPST1 IO MUX Analog14 GPIO12 IO VDDA_PMU/VBAT IO MUX15 XTAL_32K_P IO VDDA_PMU/VBAT IO MUX AnalogCont’d on next pageEspressif Systems 13Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 2 PinsTable 2-1 – cont’d from previous pagePin Pin Pin Pin Providing Pin Settings3Pin Function Sets1No. Name Type Power2At Reset After Reset IO MUX Analog16 XTAL_32K_N IO VDDA_PMU/VBAT IO MUX Analog17 CHIP_EN Analog VBAT18 VBAT Power19 VDDA_PMU Power20 VDDPST2 Power21 GPIO22 IO VDDPST2 IO MUX22 U0RXD IO VDDPST2 IE, WPU IO MUX23 U0TXD IO VDDPST2 IE, WPU IO MUX24 GPIO25 IO VDDPST2 IE IE IO MUX25 GPIO26 IO VDDPST2 IE IO MUX Analog26 GPIO27 IO VDDPST2 IE, USB_PU IO MUX Analog27 VDD3P3 Power28 XTAL_N Analog29 XTAL_P Analog30 VDD3P3 Power31 VDD3P3 Power32 ANT Analog33 GND Power1. Bold marks the pin function set in which a pin has its default function in the default boot mode. See Section 3.1 Chip Boot ModeControl.2. Default drive strength for GPIO26 and GPIO27 is 40 mA, and 20 mA for the other GPIOs.3. Column Pin Settings shows predefined settings at reset and after reset with the following abbreviations:• IE – input enabled• WPU – internal weak pull-up resistor enabled• WPD – internal weak pull-down resistor enabled• USB_PU – USB pull-up resistor enabled– By default, the USB function is enabled for USB pins (i.e., GPIO26 and GPIO27), and the pin pull-up is decided by theUSB pull-up resistor. This resistor is controlled by USB_SERIAL_JTAG_DP/DM_PULLUP, and the pull-up value ismanaged by USB_SERIAL_JTAG_PULLUP_VALUE. For details, see ESP32-H2 Technical Reference Manual > ChapterUSB Serial/JTAG Controller.– When the USB function is disabled, USB pins are used as regular GPIOs and the pin’s internal weak pull-up and pull-downresistors are disabled by default (configurable by IO_MUX_GPIOn_FUN_WPU/WPD). For details, seeESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix (GPIO, IO MUX)).4. Depends on the value of EFUSE_DIS_PAD_JTAG• 0 - WPU is enabled• 1 - pin floatingEspressif Systems 14Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 2 Pins2.3 IO Pins2.3.1 IO MUX FunctionsThe IO MUX allows multiple input/output signals to be connected to a single input/output pin. Each IO pin ofESP32-H2 can be connected to one of the five signals (IO MUX functions, i.e., F0-F4), as listed in Table 2-3 IOMUX Pin Functions.Among the five sets of signals:• Some are routed via the GPIO Matrix (GPIO0, GPIO1, etc.), which incorporates internal signal routingcircuitry for mapping signals programmatically. It gives the pin access to almost any peripheral signals.However, the flexibility of programmatic mapping comes at a cost as it might affect the latency of routedsignals. For details about connecting to peripheral signals via GPIO Matrix, seeESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix.• Some are directly routed from certain peripherals (U0TXD, MTCK, etc.), including UART0, JTAG, and SPI2- see Table 2-2 Peripheral Signals Routed via IO MUX.Table 2-2. Peripheral Signals Routed via IO MUXPin Function Signal DescriptionU0TXD Transmit dataUART0 interfaceU0RXD Receive dataMTCK Test clockJTAG interface for debuggingMTDO Test Data OutMTDI Test Data InMTMS Test Mode SelectFSPIQ Data outSPI2 interface for fast SPI connection. It supports 1-, 2-, 4-line SPI modesFSPID Data inFSPIHD HoldFSPIWP Write protectFSPICLK ClockFSPICS… Chip selectTable 2-3 IO MUX Pin Functions shows the IO MUX functions of IO pins.Table 2-3. IO MUX Pin FunctionsPin IO MUX / IO MUX Function1, 2, 3No.GPIOName2F0 Type3F1 Type F2 Type F3 Type F4 Type3 GPIO0 GPIO0 I/O/T GPIO0 I/O/T FSPIQ I1/O/T4 GPIO1 GPIO1 I/O/T GPIO1 I/O/T FSPICS0 I1/O/T5 GPIO2 MTMS I1 GPIO2 I/O/T FSPIWP I1/O/T6 GPIO3 MTDO O/T GPIO3 I/O/T FSPIHD I1/O/T7 GPIO4 MTCK I1 GPIO4 I/O/T FSPICLK I1/O/T8 GPIO5 MTDI I1 GPIO5 I/O/T FSPID I1/O/T10 GPIO8 GPIO8 I/O/T GPIO8 I/O/TCont’d on next pageEspressif Systems 15Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 2 PinsTable 2-3 – cont’d from previous pagePin IO MUX / IO MUX Function1, 2, 3No.GPIOName2F0 Type3F1 Type F2 Type F3 Type F4 Type11 GPIO9 GPIO9 I/O/T GPIO9 I/O/T12 GPIO10 GPIO10 I/O/T GPIO10 I/O/T13 GPIO11 GPIO11 I/O/T GPIO11 I/O/T14 GPIO12 GPIO12 I/O/T GPIO12 I/O/T15 GPIO13 GPIO13 I/O/T GPIO13 I/O/T16 GPIO14 GPIO14 I/O/T GPIO14 I/O/T21 GPIO22 GPIO22 I/O/T GPIO22 I/O/T22 GPIO23 U0RXD I1 GPIO23 I/O/T FSPICS1 O/T23 GPIO24 U0TXD O GPIO24 I/O/T FSPICS2 O/T24 GPIO25 GPIO25 I/O/T GPIO25 I/O/T FSPICS3 O/T25 GPIO26 GPIO26 I/O/T GPIO26 I/O/T FSPICS4 O/T26 GPIO27 GPIO27 I/O/T GPIO27 I/O/T FSPICS5 O/T1Bold marks the default pin functions in the default boot mode. See Section 3.1 Chip Boot Mode Control.2Regarding highlighted cells, see Section 2.3.3 Restrictions for GPIOs.3Each IO MUX function (Fn, n = 0 ~ 4) is associated with a type. The description of type is as follows:• I – input. O – output. T – high impedance.• I1 – input; if the pin is assigned a function other than Fn, the input signal of Fn is always 1.• I0 – input; if the pin is assigned a function other than Fn, the input signal of Fn is always 0.Espressif Systems 16Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 2 Pins2.3.2 Analog FunctionsSome IO pins also have analog functions, for analog peripherals (such as ADC) in any power mode. Internalanalog signals are routed to these analog functions, see Table 2-4 Analog Signals Routed to AnalogFunctions.Table 2-4. Analog Signals Routed to Analog FunctionsPin Function Signal DescriptionADC1_CHn ADC1 channel n signal ADC1 channel n interfaceXTAL_32K_N Negative clock signal 32 kHz external clock input/output connectedto ESP32-H2’s oscillator/crystalXTAL_32K_P Positive clock signalUSB_D- Data - (negative USB signal)USB signals from USB Serial/JTAG ControllerUSB_D+ Data + (positive USB signal)ZCDn Voltage from GPIO Pad Analog Pad voltage comparator interfaceTable 2-5 Analog Functions shows the analog functions of IO pins.Table 2-5. Analog FunctionsPin Analog Analog Function2No. IO Name1F0 F14 GPIO1 ADC1_CH05 GPIO2 ADC1_CH16 GPIO3 ADC1_CH27 GPIO4 ADC1_CH38 GPIO5 ADC1_CH412 GPIO10 ZCD013 GPIO11 ZCD115 XTAL_32K_P XTAL_32K_P16 XTAL_32K_N XTAL_32K_N25 GPIO26 USB_D-26 GPIO27 USB_D+1Bold marks the default pin functions in the default bootmode. See Section 3.1 Chip Boot Mode Control.2Regarding highlighted cells, see Section 2.3.3 Restric-tions for GPIOs.Espressif Systems 17Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 2 Pins2.3.3 Restrictions for GPIOsAll IO pins of ESP32-H2 have GPIO pin functions. However, the IO pins are multiplexed and can be configuredfor different purposes based on the requirements. Some IOs have restrictions for usage. It is essential toconsider the multiplexed nature and the limitations when using these IO pins.In tables of this chapter, some pin functions are highlighted . The non-highlighted GPIO pins are recommendedfor use first. If more pins are needed, the highlighted GPIOs should be chosen carefully to avoid conflicts withimportant pin functions.The highlighted IO pins have the following important pin functions:• Strapping pins – need to be at certain logic levels at startup. See Section 3 Boot Configurations.• USB_D+/- – by default, connected to the USB Serial/JTAG Controller. To function as GPIOs, these pinsneed to be reconfigured.• JTAG interface – often used for debugging. See Table 2-2 Peripheral Signals Routed via IO MUX. To freethese pins up, the pin functions USB_D+/- of the USB Serial/JTAG Controller can be used instead. Seealso Section 3.3 JTAG Signal Source Control.• UART interface – often used for debugging. See Table 2-2 Peripheral Signals Routed via IO MUX.See also Appendix A – ESP32-H2 Consolidated Pin Overview.Espressif Systems 18Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 2 Pins2.4 Analog PinsTable 2-6. Analog PinsPin Pin Pin PinNo. Name Type Function17 CHIP_EN IHigh: on, enables the chip (powered up).Low: off, disables the chip (powered down).Note: Do not leave the CHIP_EN pin floating.28 XTAL_N — External clock input/output connected to chip’s crystal or oscillator.P/N means differential clock positive/negative.29 XTAL_P —32 ANT I/O RF LNA input/output signalsEspressif Systems 19Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 2 Pins2.5 Power Supply2.5.1 Power PinsThe chip is powered via the power pins described in Table 2-7 Power Pins.Table 2-7. Power PinsPin Pin Power Supply1,2No. Name Direction Power Domain/Other IO Pins1 VDD3P3 Input Analog power domain2 VDD3P3 Input Analog power domain9 VDDPST1 Input IO power domain Digital IO, LP IO318 VBAT Input Analog power domain or battery power supply GPIO12, XTAL_32K_P, XTAL_32K_N19 VDDA_PMU Input Analog power domain GPIO12, XTAL_32K_P, XTAL_32K_N20 VDDPST2 Input IO power domain Digital IO27 VDD3P3 Input Analog power domain33 GND – External ground connection1See in conjunction with Section 2.5.2 Power Scheme.2For recommended and maximum voltage and current, see Section 5.1 Absolute Maximum Ratings and Section 5.2Recommended Operating Conditions.3For the classification of digital IO and LP IO, see Section 2.2 Pin Overview.2.5.2 Power SchemeThe power scheme is shown in Figure 2-2 ESP32-H2 Power Scheme.The components on the chip are powered via voltage regulators.Table 2-8. Voltage RegulatorsVoltage Regulator Output Power SupplyDigital 1.1 V Digital power domainLow-power 1.1 V LP power domainEspressif Systems 20Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 2 PinsLPVoltageRegulatorDigitalVoltageRegulatorLP SystemDigitalSystemVDDPST1/VDDPST2 VDD3P3 VBATAnalogLP IODigital IOVDDA_PMUGPIO12XTAL_32K_NXTAL_32K_P Figure 2-2. ESP32-H2 Power Scheme2.5.3 Chip Power-up and ResetOnce the power is supplied to the chip, its power rails need a short time to stabilize. After that, CHIP_EN – thepin used for power-up and reset – is pulled high to activate the chip. For information on CHIP_EN as well aspower-up and reset timing, see Figure 2-3 and Table 2-9.VIL_nRSTtST BLtRST2.8 VVDDPST1/2,VDD3P3,VDDA_PMU,VBATCHIP_ENFigure 2-3. Visualization of Timing Parameters for Power-up and ResetTable 2-9. Description of Timing Parameters for Power-up and ResetParameter Description Min (µs)tST BLTime reserved for the power rails of VDDPST1, VDDPST2, VDD3P3,VDDA_PMU, and VBAT to stabilize before the CHIP_EN pin is pulledhigh to activate the chip50tRSTTime reserved for CHIP_EN to stay below VIL _nRSTto reset thechip (see Table 5-3)50Espressif Systems 21Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 3 Boot Configurations3 Boot ConfigurationsThe chip allows for configuring the following boot parameters through strapping pins, eFuse bits, and registers atpower-up or a hardware reset, without microcontroller interaction.• Chip boot mode– Strapping pin: GPIO8 and GPIO9• ROM message printing– Strapping pin: GPIO8– eFuse bits: EFUSE_UART_PRINT_CONTROL and EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT– Register: LP_AON_STORE4_REG[0]• JTAG signal source– Strapping pin: GPIO25– eFuse bits: EFUSE_DIS_PAD_JTAG, EFUSE_DIS_USB_JTAG, and EFUSE_JTAG_SEL_ENABLEThe default values of all the above eFuse bits are 0, which means that they are not burnt. Given that eFuse isone-time programmable, once an eFuse bit is programmed to 1, it can never be reverted to 0. For how toprogram eFuse bits, please refer to ESP32-H2 Technical Reference Manual > Chapter eFuse Controller.The default values of the strapping pins, namely the logic levels, are determined by pins’ internal weakpull-up/pull-down resistors at reset if the pins are not connected to any circuit, or connected to an externalhigh-impedance circuit.Table 3-1. Default Configuration of Strapping PinsStrapping Pin Default Configuration Bit ValueGPIO8 Floating —GPIO9 Weak pull-up 1GPIO25 Floating —To change the bit values, the strapping pins should be connected to external pull-down/pull-up resistances. If theESP32-H2 is used as a device by a host MCU, the strapping pin voltage levels can also be controlled by the hostMCU.All strapping pins have latches. At system reset, the latches sample the bit values of their respective strappingpins and store them until the chip is powered down or shut down. The states of latches cannot be changed inany other way. It makes the strapping pin values available during the entire chip operation, and the pins are freedup to be used as regular IO pins after reset.The timing of signals connected to the strapping pins should adhere to the setup time and hold time specificationsin Table 3-2 and Figure 3-1.Espressif Systems 22Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 3 Boot ConfigurationsTable 3-2. Description of Timing Parameters for the Strapping PinsParameter Description Min (ms)tSUSetup time is the time reserved for the power rails to stabilize beforethe CHIP_EN pin is pulled high to activate the chip.0tHHold time is the time reserved for the chip to read the strapping pinvalues after CHIP_EN is already high and before these pins startoperating as regular IO pins.3Strapping pinVIH_nRSTVIHtSUtHCHIP_ENFigure 3-1. Visualization of Timing Parameters for the Strapping Pins3.1 Chip Boot Mode ControlGPIO8 and GPIO9 control the boot mode after the reset is released. See Table 3-3 Chip Boot ModeControl.Table 3-3. Chip Boot Mode ControlBoot Mode1GPIO8 GPIO9SPI Boot Any value 1Joint Download Boot21 01Bold marks the default value and configura-tion.2Joint Download Boot mode supports the fol-lowing download methods:• USB Download Boot:– USB-Serial-JTAG Download Boot• UART Download BootEspressif Systems 23Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 3 Boot Configurations3.2 ROM Messages Printing ControlDuring the boot process, ROM message printing is enabled if LP_AON_STORE4_REG[0] is 0 (default), anddisabled if LP_AON_STORE4_REG[0] is 1. When ROM message printing is enabled, the messages can beprinted to:• (Default) UART0 and USB Serial/JTAG controller• USB Serial/JTAG controller• UART0EFUSE_UART_PRINT_CONTROL, LP_AON_STORE4_REG[0], and GPIO8 control ROM messages printing toUART0 as shown in Table 3-4 UART0 ROM Message Printing Control.Table 3-4. UART0 ROM Message Printing ControlUART0 ROM Message Printing1LP_AON_STORE4_REG[0] EFUSE_UART_PRINT_CONTROL GPIO8Enabled 00 Ignored1 02 1Disabled01 12 03 Ignored1 Ignored Ignored1Bold marks the default value and configuration.EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT controls the printing to USB Serial/JTAG controller as shown inTable 3-5 USB Serial/JTAG ROM Message Printing Control.Table 3-5. USB Serial/JTAG ROM Message Printing ControlUSB Serial/JTAG ROM Mes-sage Printing Control1LP_AON_STORE4_REG[0] EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINTEnabled 0 0Disabled0 11 Ignored1Bold marks the default value and configuration.3.3 JTAG Signal Source ControlThe strapping pin GPIO25 can be used to control the source of JTAG signals during the early boot process. Thispin does not have any internal pull resistors and the strapping value must be controlled by the external circuit thatcannot be in a high impedance state.As Table 3-6 shows GPIO25 is used in combination with EFUSE_DIS_PAD_JTAG, EFUSE_DIS_USB_JTAG, andEFUSE_JTAG_SEL_ENABLE.Espressif Systems 24Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 3 Boot ConfigurationsTable 3-6. JTAG Signal Source ControlJTAG Signal Source1EFUSE_DIS_PAD_JTAG EFUSE_DIS_USB_JTAG EFUSE_STRAP_JTAG_SEL_ENABLE GPIO25USB Serial/JTAG Controller0 00 IgnoredJTAG pins210USB Serial/JTAG Controller 1JTAG pins20 1 Ignored IgnoredUSB Serial/JTAG Controller 1 0 Ignored IgnoredJTAG is disabled 1 1 Ignored Ignored1Bold marks the default value and configuration.2JTAG pins refer to MTDI, MTCK, MTMS, and MTDO.Espressif Systems 25Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description4 Functional Description4.1 SystemThis section describes the core of the chip’s operation, covering its microprocessor, memory organization,system components, and security features.4.1.1 Microprocessor and MasterThis subsection describes the core processing units within the chip and their capabilities.4.1.1.1 ESP-RISC-V CPUThe ESP-RISC-V CPU is a 32-bit core based on the RISC-V instruction set architecture (ISA) comprising baseinteger (I), multiplication/division (M), atomic (A), and compressed (C) standard extensions.Feature List• Four-stage pipeline that supports an operating clock frequency of up to 96 MHz• RV32IMAC ISA (instruction set architecture)• Compatible with RISC-V ISA Manual Volume I: Unprivileged ISA Version 2.2 and RISC-V ISA Manual,Volume II: Privileged Architecture, Version 1.10• Zero wait cycle access to on-chip SRAM and cache for program and data access over IRAM/DRAMinterface• Branch target buffer (BTB) with static branch prediction• User (U) mode support along with interrupt delegation• Interrupt controller with up to 28 external vectored interrupts for both M and U modes with 16programmable priority and threshold levels• Core local interrupts (CLINT) dedicated for machine mode and user mode• Debug module (DM) compliant with the specification RISC-V External Debug Support Version 0.13 withexternal debugger support over an industry-standard JTAG/USB port• Support for instruction trace, see Section 4.1.1.2 RISC-V Trace Encoder• Debugger with a direct system bus access (SBA) to memory and peripherals• Hardware trigger compliant to the specification RISC-V External Debug Support Version 0.13 with up to 4breakpoints/watchpoints• Physical memory protection (PMP) and attributes (PMA) for up to 16 configurable regions• 32-bit AHB system bus for peripheral access• Configurable events for core performance metricsFor details, see ESP32-H2 Technical Reference Manual > Chapter ESP-RISC-V CPU.Espressif Systems 26Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description4.1.1.2 RISC-V Trace EncoderThe RISC-V Trace Encoder in the ESP32-H2 chip provides a way to capture detailed trace information from theCPU’s execution, enabling deeper analysis and optimization of the system. It connects to the CPU’s instructiontrace interface and compresses the information into smaller packets, which are then stored in internalSRAM.Feature List• Compatible with RISC-V Processor Trace Version 1.0• Arbitrary address range of the trace memory size• Two synchronization modes:– synchronization counter counts by packet– synchronization counter counts by cycle• Trace lost status to indicate packet loss• Automatic restart after packet loss• Configurable memory writing mode: loop mode or non-loop mode• FIFO (128 × 8 bits) to buffer packetsFor details, see ESP32-H2 Technical Reference Manual > Chapter RISC-V Trace Encoder (TRACE).4.1.1.3 GDMA ControllerThe GDMA Controller is a General Direct Memory Access (GDMA) controller that allows peripheral-to-memory,memory-to-peripheral, and memory-to-memory data transfer without the CPU’s intervention. The GDMA has sixindependent channels, three transmit and three receive. These channels are shared by peripherals with theGDMA feature, such as SPI2, UHCI (UART0/UART1), I2S, AES, SHA, ADC, and PARLIO.Feature List• AHB bus architecture• Programmable length of data to be transferred in bytes• Linked list of descriptors for efficient data transfer management• INCR burst transfer when accessing internal RAM for improved performance• Access to an address space of up to 324 KB in internal RAM• Software-configurable selection of peripheral requesting service• Fixed-priority and round-robin channel arbitration schemes for managing bandwidth• Support for Event Task MatrixFor details, see ESP32-H2 Technical Reference Manual > Chapter GDMA Controller (DMA).Espressif Systems 27Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description4.1.2 Memory OrganizationThis subsection describes the memory arrangement to explain how data is stored, accessed, and managed forefficient operation.Figure 4-1 illustrates the address mapping structure of ESP32-H2.Figure 4-1. Address Mapping Structure4.1.2.1 Internal MemoryThe internal memory of ESP32-H2 refers to the memory integrated on the chip die or in the chip package,including ROM, SRAM, eFuse, and flash.Feature List• 128 KB of ROM for booting and core functions• 320 KB of high-performance SRAM (HP SRAM) for data and instructions• 4 KB of low-power SRAM (LP SRAM) that can be accessed by CPU. It can retain data in Deep-sleep mode• 4096-bit eFuse memory, with 1792 bits available for users. See also Section 4.1.2.3 eFuse Controller• In-package flash– Flash sizeEspressif Systems 28Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description* ESP32-H2FH2S chip variant: 2 MB* ESP32-H2FH4S chip variant: 4 MB– More than 100,000 program/erase cycles– More than 20 years of data retention time– Clock frequency:* ESP32-H2FH2S chip variant: up to 64 MHz* ESP32-H2FH4S chip variant: up to 64 MHzFor details, see ESP32-H2 Technical Reference Manual > Chapter System and Memory.4.1.2.2 External MemoryESP32-H2 allows connection to memories outside the chip’s package via the SPI, Dual SPI, Quad SPI, and QPIinterfaces.Feature List• Support connection to off-package flash of 16 MB at most– Support hardware encryption/decryption based on XTS-AES– Up to 16 MB of CPU instruction memory space can map into flash as individual blocks of 64 KB.32-bit fetch is supported– Up to 16 MB of CPU data memory space can map into flash as individual blocks of 64 KB. 8-bit,16-bit and 32-bit reads are supported• External memory accessed via a 16 KB read-only cache– Eight-way set associative– 32-byte cache block– Critical word first and early restartFor details, see ESP32-H2 Technical Reference Manual > Chapter System and Memory.4.1.2.3 eFuse ControllerThe eFuse memory is a one-time programmable memory that stores parameters and user data. The eFusecontroller in the ESP32-H2 is responsible for programming and reading this memory.Feature List• Configurable write protection for some blocks• Configurable read protection for some blocks• Various hardware encoding schemes against data corruptionFor details, see ESP32-H2 Technical Reference Manual > ChaptereFuse Controller.Espressif Systems 29Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description4.1.3 System ComponentsThis subsection describes the essential components that contribute to the overall functionality and control of thesystem.4.1.3.1 IO MUX and GPIO MatrixThe IO MUX and GPIO Matrix in the ESP32-H2 chip provide flexible routing of peripheral input and output signalsto the GPIO pins. These peripherals enhance the functionality and performance of the chip by allowing theconfiguration of I/O, support for multiplexing, and signal synchronization for peripheral inputs.Feature List• 19 GPIO pins for general-purpose I/O or connection to internal peripheral signals• GPIO matrix:– Routing 78 peripheral input and 99 output signals to any GPIO pin– Signal synchronization for peripheral inputs based on IO MUX operating clock– GPIO Filter hardware for input signal filtering– Glitch Filter hardware for second time filtering on input signal– Sigma delta modulated (SDM) output– GPIO simple input and output• IO MUX for directly connecting certain digital signals (SPI, JTAG, UART) to pins• Support for Event Task MatrixFor details, see ESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix.4.1.3.2 ResetThe ESP32-H2 chip provides four types of reset that occur at different levels, namely CPU Reset, Core Reset,System Reset, and Chip Reset. Except for Chip Reset, all reset types preserve the data stored in internalmemory.Feature List• Four types of reset:– CPU Reset – Resets the CPU core– Core Reset – Resets the whole digital system except for the LP system– System reset – Resets the whole digital system, including the LP system– Chip reset – Resets the whole chip• Reset trigger:– Directly by hardware– Via software by configuring the corresponding registers of the CPUEspressif Systems 30Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description• Support for retrieving reset causeFor details, see ESP32-H2 Technical Reference Manual > Chapter Reset and Clock.4.1.3.3 ClockThe ESP32-H2 chip has clocks sourced from oscillators, RC circuits, and PLL circuits, which are then processedby dividers or selectors. The clocks can be classified into high speed clocks and slow speed clocks.Feature List• High speed clocks (used for devices working at higher frequencies)– 32 MHz external crystal clockNote:The chip cannot operate without the external crystal clock.– 96 MHz internal PLL clock– 64 MHz internal PLL clock• Slow speed clocks (used for LP system and some peripherals working in low-power mode)– 32 kHz external crystal clock– Internal fast RC oscillator with adjustable frequency (8 MHz by default)– 130 kHz internal slow RC oscillator– Internal PLL clock– External slow clock input through XTAL_32K_P (32 kHz by default)For details, see ESP32-H2 Technical Reference Manual > Chapter Reset and Clock.4.1.3.4 Interrupt MatrixThe Interrupt Matrix in the ESP32-H2 chip routes interrupt requests generated by various peripherals and eventsto CPU interrupts.Feature List• 65 peripheral interrupt sources accepted as input• 28 CPU peripheral interrupts generated to CPU as output• Current interrupt status query of peripheral interrupt sources• Multiple interrupt sources mapping to a single CPU interrupt (i.e., shared interrupts)For details, see ESP32-H2 Technical Reference Manual > Chapter Interrupt Matrix.Espressif Systems 31Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description4.1.3.5 Event Task MatrixThe Event Task Matrix (ETM) allows events from any specified peripheral to be mapped to tasks of any specifiedperipheral, enabling peripherals to execute specified tasks without CPU intervention. Peripherals supporting ETMinclude GPIO, LED PWM, general-purpose timers, RTC Timer, system timer, MCPWM, temperature sensor, ADC,I2S, GDMA, and PMU.Feature List• 50 channels that can be enabled and configured independently• Receive 122 events from multiple peripherals• Generate 129 tasks for multiple peripheralsFor details, see ESP32-H2 Technical Reference Manual > Chapter Event Task Matrix.4.1.3.6 Power Management UnitThe ESP32-H2 has an advanced Power Management Unit (PMU). It can be flexibly configured to power updifferent power domains of the chip to achieve the best balance between chip performance, power consumption,and wakeup latency.Configuring the PMU is a complex procedure. To simplify power management for typical scenarios, there are thefollowing predefined power modes that power up different combinations of power domains:• Active mode – The CPU, RF circuits, and all peripherals are on. The chip can process data, receive,transmit, and listen.• Modem-sleep mode – The CPU is on, but the clock frequency can be reduced. The wireless connectionscan be configured to remain active as RF circuits are periodically switched on when required.• Light-sleep mode – The CPU stops running, and can be optionally powered on. The LP peripherals canbe woken up periodically by the timer. The chip can be woken up via all wake up mechanisms: Modem,RTC timer, or external interrupts. Wireless connections can remain active. Some groups of digitalperipherals can be optionally powered off.• Deep-sleep mode – Only LP system is powered on. Wireless connection data is stored in LP memory.For power consumption in different power modes, see Section 5.5 Current Consumption.For details, see ESP32-H2 Technical Reference Manual > Chapter Low-Power Management.4.1.3.7 System TimerThe System Timer (SYSTIMER) in the ESP32-H2 chip is a 52-bit timer that can be used to generate tickinterrupts for the operating system or as a general timer to generate periodic or one-time interrupts.Feature List• Two 52-bit counters and three 52-bit comparators• 52-bit alarm values and 26-bit alarm periods• Two modes to generate alarms: target mode and period modeEspressif Systems 32Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description• Three comparators generating three independent interrupts based on configured alarm value or alarmperiod• Ability to load back sleep time recorded by RTC timer via software after Deep-sleep or Light-sleep• Counters can be stalled if the CPU is stalled or in OCD mode• Real-time alarm eventsFor details, see ESP32-H2 Technical Reference Manual > Chapter System Timer.4.1.3.8 Timer GroupsThe Timer Group (TIMG) in the ESP32-H2 chip can be used to precisely time an interval, trigger an interrupt aftera particular interval (periodically and aperiodically), or act as a hardware clock. ESP32-H2 has two timer groups,each consisting of one general-purpose timer and one Main System Watchdog Timer.Feature List• 16-bit prescaler• 54-bit auto-reload-capable up-down counter• Able to read real-time value of the time-base counter• Halt, resume, and disable the time-base counter• Programmable alarm generation• Timer value reload (auto-reload at an alarm or a software-controlled instant reload)• RTC slow clock frequency calculation• Level interrupt generation• Support for several ETM tasks and eventsFor details, see ESP32-H2 Technical Reference Manual > Chapter Timer Group (TIMG).4.1.3.9 Watchdog TimersThe Watchdog Timers (WDT) in ESP32-H2 are used to detect and recover from malfunctions. The chip containsthree digital watchdog timers: one in each of the two timer groups (MWDT) and one in the RTC Module (RWDT).Additionally, there is one analog watchdog timer called the Super watchdog (SWD) that helps prevent the systemfrom operating in a sub-optimal state.Feature List• Digital watchdog timers:– Four stages, each with a separately programmable timeout value and timeout action– Timeout actions: Interrupt, CPU reset, core reset, system reset (RWDT only)– Flash boot protection under SPI Boot mode at stage 0– Write protection that makes WDT register read only unless unlockedEspressif Systems 33Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description– 32-bit timeout counter• Analog watchdog timer：– Timeout period slightly less than one second– Timeout actions: Interrupt, system resetFor details, see ESP32-H2 Technical Reference Manual > Chapter Watchdog Timers.4.1.3.10 Permission ControlThe Permission Control module in ESP32-H2 is responsible for managing access permissions to memory andperipheral registers. It consists of two parts: PMP (Physical Memory Protection) and APM (Access PermissionManagement).Feature List• Access permission management for ROM, HP memory, HP peripheral, LP memory, and LP peripheraladdress spaces• APM supports each master (such as DMA) to select one of the four security modes• Access permission configuration for up to 16 address ranges• Interrupt function and exception information recordFor details, see ESP32-H2 Technical Reference Manual > Chapter Permission Control (PMS).4.1.3.11 System RegistersThe System Registers in the ESP32-H2 chip are used to configure various auxiliary chip features.Feature List• Control external memory encryption and decryption• Control Bus timeout protectionFor details, see ESP32-H2 Technical Reference Manual > Chapter System Registers.4.1.3.12 Debug AssistantThe Debug Assistant provides a set of functions to help locate bugs and issues during software debugging. Itoffers various monitoring capabilities and logging features to assist in identifying and resolving software errorsefficiently.Feature List• Read/write monitoring: Monitor whether the CPU bus reads from or writes to a specified memory addressspace• Stack pointer (SP) monitoring: Monitor whether the stack pointer is out of a limited range (overflows), andgenerates an interrupt if overflow occurs. violation will trigger an interrupt.Espressif Systems 34Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description• Program counter (PC) logging: Record PC value. The developer can get the last PC value at the mostrecent CPU reset• Bus access logging: Record information about bus access when the CPU or DMA writes a specified valueFor details, see ESP32-H2 Technical Reference Manual > Chapter Debug Assistant (ASSIST_DEBUG).4.1.4 Cryptography and Security ComponentsThis subsection describes the security features incorporated into the chip, which safeguard data andoperations.4.1.4.1 AES AcceleratorESP32-H2 integrates an Advanced Encryption Standard (AES) accelerator, which is a hardware device thatspeeds up computation using AES algorithm significantly, compared to AES algorithms implemented solely insoftware. The AES accelerator integrated in ESP32-H2 has two working modes, which are Typical AES andDMA-AES.Feature List• Typical AES working mode– AES-128/AES-256 encryption and decryption• DMA-AES working mode– AES-128/AES-256 encryption and decryption– Block cipher mode* ECB (Electronic Codebook)* CBC (Cipher Block Chaining)* OFB (Output Feedback)* CTR (Counter)* CFB8 (8-bit Cipher Feedback)* CFB128 (128-bit Cipher Feedback)– Interrupt on completion of computation• Anti-attack pseudo-round function, to enhance the chip’s anti-attack performanceFor details, see ESP32-H2 Technical Reference Manual > Chapter AES Accelerator (AES).4.1.4.2 ECC AcceleratorThe ECC Accelerator accelerates calculations based on the Elliptic Curve Cryptography (ECC) algorithm andECC-derived algorithms like ECDSA, which offers the advantages of smaller public keys compared to RSAcryptography with equivalent security.Espressif Systems 35Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional DescriptionFeature List• Supports two different elliptic curves (P-192 and P-256)• 11 working modes that support Base Point Verification, Base Point Multiplication, Jacobian PointVerification, Jacobian Point Multiplication, and mod operations• High anti-attack performance. Each point multiplication calculation of the ECC accelerator consumes:– the same amount of time– the same amount of powerFor details, see ESP32-H2 Technical Reference Manual > Chapter ECC Accelerator (ECC).4.1.4.3 HMAC AcceleratorThe HMAC Accelerator (HMAC) module is designed to compute Message Authentication Codes (MACs) usingthe SHA-256 Hash algorithm and keys as described in RFC 2104. It provides hardware support for HMACcomputations, significantly reducing software complexity and improving performance.Feature List• Standard HMAC-SHA-256 algorithm• Compatibility with challenge-response authentication algorithm• Generates required keys for the Digital Signature Algorithm (DSA) peripheral in downstream mode• Re-enables soft-disabled JTAG in downstream mode• Hash result only accessible by configurable hardware peripheral (in downstream mode)For details, see ESP32-H2 Technical Reference Manual > Chapter HMAC Accelerator (HMAC).4.1.4.4 RSA AcceleratorThe RSA accelerator provides hardware support for high-precision computation used in various RSA asymmetriccipher algorithms, significantly improving their run time and reducing their software complexity. Compared withRSA algorithms implemented solely in software, this hardware accelerator can speed up RSA algorithmssignificantly.Feature List• Large-number modular exponentiation with two optional acceleration options, operands width up to 3072bits• Large-number modular multiplication, operands width up to 3072 bits• Large-number multiplication, operands width up to 1536 bits• Operands of different widths• Interrupt on completion of computationFor details, see ESP32-H2 Technical Reference Manual > Chapter RSA Accelerator (RSA).Espressif Systems 36Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description4.1.4.5 SHA AcceleratorThe SHA Accelerator (SHA) is a hardware device that significantly speeds up the SHA algorithm compared tosoftware-only implementations.Feature List• Support for multiple SHA algorithms: SHA-1, SHA-224, and SHA-256• Two working modes: Typical SHA based on CPU and DMA-SHA based on DMAFor details, see ESP32-H2 Technical Reference Manual > Chapter SHA Accelerator (SHA).4.1.4.6 Digital SignatureThe Digital Signature (DS) module in the ESP32-H2 chip generates message signatures based on RSA withhardware acceleration.Feature List• RSA digital signatures with key length up to 3072 bits• Encrypted private key data, only decryptable by DS module• SHA-256 digest to protect private key data against tampering by an attackerFor details, see ESP32-H2 Technical Reference Manual > Chapter Digital Signature (DS).4.1.4.7 Elliptic Curve Digital Signature Algorithm (ECDSA)In cryptography, the Elliptic Curve Digital Signature Algorithm (ECDSA) offers a variant of the Digital SignatureAlgorithm (DSA) which uses elliptic-curve cryptography. ESP32-H2’s ECDSA accelerator provides a secure andefficient environment for computing ECDSA signatures. It offers fast computations while ensuring theconfidentiality of the signing process to prevent information leakage.Feature List• Digital signature generation and verification• Two different elliptic curves, namely P-192 and P-256• Dynamic access permission in different operation statuses to ensure information security• High anti-attack performance. Each time a signature is generated and verified, ECDSA consumes:– the same amount of time– the same amount of powerFor details, see ESP32-H2 Technical Reference Manual > Chapter Elliptic Curve Digital Signature Algorithm(ECDSA).Espressif Systems 37Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description4.1.4.8 External Memory Encryption and DecryptionThe External Memory Encryption and Decryption (XTS_AES) module in the ESP32-H2 chip provides security forusers’ application code and data stored in the external memory (flash).Feature List• General XTS-AES algorithm, compliant with IEEE Std 1619-2007• Software-based manual encryption• High-speed auto decryption without software’s participation• Encryption and decryption functions jointly enabled/disabled by registers configuration, eFuse parameters,and boot mode• Configurable Anti-DPA• Pseudo-round anti-DPA functionFor details, see ESP32-H2 Technical Reference Manual > Chapter External Memory Encryption and Decryption(XTS_AES).4.1.4.9 Random Number GeneratorThe Random Number Generator (RNG) in the ESP32-H2 is a true random number generator that generates32-bit random numbers for cryptographic operations from a physical process.Feature List• RNG entropy source– Thermal noise from high-speed ADC or SAR ADC– An asynchronous clock mismatchFor more details about the Random Number Generator, refer to the ESP32-H2 Technical Reference Manual >Chapter Random Number Generator (RNG).4.1.4.10 Power Glitch DetectorThe ESP32-H2 chip integrates a power glitch detector that monitors the voltage of power supply pins, includingVDDPST1, VDDPST2, and VDD3P3 (PIN 27), in real time. It can detect voltage abnormalities occurring at thesepins. For example, when a sudden voltage drop or voltage glitch is detected, the chip triggers a power glitchreset to ensure the system safely returns to a controllable state. This prevents logic errors, data loss, or hardwaredamage caused by power glitch.Features• Real-time monitoring of the voltage on specific power pins• Ability to trigger a power glitch reset to prevent power glitch attacks• Enabled by default at power-upEspressif Systems 38Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional DescriptionFor more details about the Power Glitch Detector, refer to ESP32-H2 Technical Reference Manual > ChapterPower Supply Detector.4.1.4.11 Secure BootThe Secure boot feature in the ESP32-H2 chip ensures that only the signed firmware can be booted.Feature List• Supported signature type– RSA-RSS signature– ECDSA signatureFor details, see ESP-IDF Programming Guide > Secure Boot v2.Espressif Systems 39Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description4.2 PeripheralsThis section describes the chip’s peripheral capabilities, covering connectivity interfaces and on-chip sensors thatextend its functionality.4.2.1 Connectivity InterfacesThis subsection describes the connectivity interfaces on the chip that enable communication and interaction withexternal devices and networks.4.2.1.1 UART ControllerThe UART Controller in the ESP32-H2 chip facilitates the transmission and reception of asynchronous serial databetween the chip and external UART devices. It consists of two UARTs in the system.Feature List• Programmable baud rates up to 5 MBaud• 260 x 8 bit RAM shared by TX FIFOs and RX FIFOs• Support for various lengths of data bits and stop bits• Parity bit support• Special character AT_CMD detection• RS485 protocol support• IrDA protocol support• High-speed data communication using GDMA• Receive timeout feature• UART as the wake-up source• Software and hardware flow controlFor details, see ESP32-H2 Technical Reference Manual > Chapter UART Controller (UART).Pin AssignmentThe pins connected to receive and transmit signals (U0RXD and U0TXD) for UART0 are multiplexed with GPIO23~ GPIO24 and FSPICS1 ~ FSPICS2 via IO MUX. Other signals can be routed to any GPIOs via the GPIOmatrix.For more information about the pin assignment, see Section 2.3 IO Pins andESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix.4.2.1.2 SPI ControllerESP32-H2 has the following SPI interfaces:• SPI0/SPI1 are reserved for system use.• SPI2 is a general-purpose SPI (GP-SPI) controller with access to general-purpose DMA channels.Espressif Systems 40Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional DescriptionFeatures of SPI2• Supports operation as a master or slave• Support for DMA• Supports Single SPI, Dual SPI, Quad SPI, QPI modes• Configurable clock polarity (CPOL) and phase (CPHA)• Configurable clock frequency• Data transmission is in bytes• Configurable read and write data bit order: most-significant bit (MSB) first, or least-significant bit (LSB) first• As a master– Supports 2-line full-duplex communication with clock frequency up to 48 MHz– Supports 1-, 2-, 4-line half-duplex communication with clock frequency up to 48 MHz– Provides six FSPICS… pins for connection with six independent SPI slaves– Configurable CS setup time and hold time• As a slave– Supports 2-line full-duplex communication with clock frequency up to 32 MHz– Supports 1-, 2-, 4-line half-duplex communication with clock frequency up to 32 MHzFor details, see ESP32-H2 Technical Reference Manual > Chapter SPI Controller (SPI).Pin Assignment• Via IO MUXFor SPI2, the pins for data and clock signals are multiplexed with GPIO0, GPIO2 ~ GPIO5, and JTAGinterface via the IO MUX. The pins for chip select signals are multiplexed with GPIO1, GPIO23 ~ GPIO27,UART0 interface, and USB interface via the IO MUX.• Via GPIO MatrixThe pins for SPI2 can be chosen from any GPIOs via the GPIO matrix.For more information about the pin assignment, see Section 2.3 IO Pins andESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix.4.2.1.3 I2C ControllerThe I2C Controller supports communication between the master and slave devices using the I2C bus.Feature List• Two I2C controllers• Communication with multiple external devices• Master and slave modes• Standard mode (100 Kbit/s) and fast mode (400 Kbit/s)Espressif Systems 41Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description• SCL clock stretching in slave mode• Programmable digital noise filtering• Support for 7-bit and 10-bit addressing, as well as dual address modeFor details, see ESP32-H2 Technical Reference Manual > Chapter I2C Controller (I2C).Pin AssignmentThe pins used for I2C can be chosen from any GPIOs via the GPIO Matrix.For more information about the pin assignment, see Section 2.3 IO Pins andESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix.4.2.1.4 I2S ControllerThe I2S Controller in the ESP32-H2 chip provides a flexible communication interface for streaming digital data inmultimedia applications, particularly digital audio applications.Feature List• Master mode and slave mode• Full-duplex and half-duplex communications• Separate TX and RX units that can work independently or simultaneously• A variety of audio standards supported:– TDM Philips standard– TDM MSB alignment standard– TDM PCM standard– PDM standard• PCM-to-PDM TX interface• Configurable high-precision BCK clock, with frequency up to 40 MHz– Sampling frequencies can be 8 kHz, 16 kHz, 32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 128 kHz,etc.• 8-/16-/24-/32-bit data communication• Direct Memory Access (DMA)• A-law and µ-law compression/decompression algorithms for improved signal-to-quantization noise ratio• Flexible data format controlFor details, see ESP32-H2 Technical Reference Manual > Chapter I2S Controller (I2S).Pin AssignmentThe pins for the I2S Controller can be chosen from any GPIOs via the GPIO Matrix.Espressif Systems 42Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional DescriptionFor more information about the pin assignment, see Section 2.3 IO Pins andESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix.4.2.1.5 Pulse Count ControllerThe Pulse Count Controller (PCNT) is designed to count input pulses by tracking the rising and falling edges ofthe input pulse signal.Feature List• Four independent pulse counters with two channels each• Counter modes: increment, decrement, or disable• Glitch filtering for input pulse signals and control signals• Selection between counting on rising or falling edges of the input pulse signalFor details, see ESP32-H2 Technical Reference Manual > Chapter Pulse Count Controller (PCNT).Pin AssignmentThe pins for the Pulse Count Controller can be chosen from any GPIOs via the GPIO Matrix.For more information about the pin assignment, see Section 2.3 IO Pins andESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix.4.2.1.6 USB Serial/JTAG ControllerThe USB Serial/JTAG controller in the ESP32-H2 chip provides an integrated solution for communicating to thechip over a standard USB CDC-ACM serial port as well as a convenient method for JTAG debugging. Iteliminates the need for external chips or JTAG adapters, saving space and reducing cost.Feature List• USB 2.0 full speed compliant, capable of up to 12 Mbit/s transfer speed (Note that this controller does notsupport the faster 480 Mbit/s high-speed transfer mode)• CDC-ACM virtual serial port and JTAG adapter functionality• CDC-ACM:– CDC-ACM adherent serial port emulation (plug-and-play on most modern OSes)– Host controllable chip reset and entry into download mode• JTAG adapter functionality:– Fast communication with CPU debugging core using a compact representation of JTAG instructions• Internal PHYFor details, see ESP32-H2 Technical Reference Manual > Chapter USB Serial/JTAG Controller(USB_SERIAL_JTAG).Espressif Systems 43Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional DescriptionPin AssignmentThe pins USB_D+ and USB_D- for the USB Serial/JTAG Controller are multiplexed with GPIO26 ~ GPIO27 andFSPICS4 ~ FSPICS5 via IO MUX.For more information about the pin assignment, see Section 2.3 IO Pins andESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix.4.2.1.7 Two-wire Automotive InterfaceThe Two-wire Automotive Interface (TWAI®) is a multi-master, multi-cast communication protocol designed forautomotive applications. The TWAI controller facilitates the communication based on this protocol.Feature List• Compatible with ISO 11898-1 protocol (CAN Specification 2.0)• Standard frame format (11-bit ID) and extended frame format (29-bit ID)• Bit rates from 1 Kbit/s to 1 Mbit/s• Multiple modes of operation: Normal, Listen Only, and Self-Test (no acknowledgment required)• Special transmissions: Single-shot and Self Reception• Acceptance filter (single and dual filter modes)• Error detection and handling: error counters, configurable error warning limit, error code capture, arbitrationlost capture, automatic transceiver standbyFor details, see ESP32-H2 Technical Reference Manual > Chapter Two-wire Automotive Interface.Pin AssignmentThe pins for the Two-wire Automotive Interface can be chosen from any GPIOs via the GPIO Matrix.For more information about the pin assignment, see Section 2.3 IO Pins andESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix.4.2.1.8 LED PWM ControllerThe LED PWM Controller (LEDC) is designed to generate PWM signals for LED control.Feature List• Six independent PWM generators• Maximum PWM duty cycle resolution of 20 bits• Four independent timers with 20-bit counters, configurable fractional clock dividers and counter overflowvalues• Adjustable phase of PWM signal output• PWM duty cycle dithering• Automatic duty cycle fadingEspressif Systems 44Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description– Linear duty cycle fading — only one duty cycle range– Gamma curve fading — up to 16 duty cycle ranges for each PWM generator, with independentlyconfigured fading direction (increase or decrease), fading amount, number of fades, and fadingfrequency• PWM signal output in low-power mode (Light-sleep mode)• Event generation and task response achieved by the Event Task Matrix (ETM)For details, see ESP32-H2 Technical Reference Manual > Chapter LED PWM Controller.Pin AssignmentThe pins for the LED PWM Controller can be chosen from any GPIOs via the GPIO Matrix.For more information about the pin assignment, see Section 2.3 IO Pins andESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix.4.2.1.9 Motor Control PWMThe Motor Control Pulse Width Modulator (MCPWM) is designed for driving digital motors and smart light. TheMCPWM is divided into five main modules: PWM timers, PWM operators, Capture module, Fault Detectionmodule, and Event Task Matrix (ETM) module.Feature List• Three PWM timers for precise timing and frequency control– Every PWM timer has a dedicated 8-bit clock prescaler– The 16-bit counter in the PWM timer can work in count-up mode, count-down mode, orcount-up-down mode– Hardware or software synchronization to trigger a reload on the PWM timer or the prescaler’s restart,with selectable hardware synchronization source• Three PWM operators for generating waveform pairs– Six PWM outputs to operate in several topologies– The control of the PWM signal can be updated asynchronously– Configurable dead time on rising and falling edges; each set up independently– Modulating of PWM output by high-frequency carrier signals, useful when gate drivers are insulatedwith a transformer– Period, time stamps, and important control registers have shadow registers with flexible updatingmethods• Capture module for hardware-based signal processing– Speed measurement of rotating machinery– Measurement of elapsed time between position sensor pulses– Period and duty cycle measurement of pulse train signalsEspressif Systems 45Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description– Decoding current or voltage amplitude derived from duty-cycle-encoded signals of current/voltagesensors– Three individual capture channels, each of which with a 32-bit time-stamp register– Selection of edge polarity and prescaling of input capture signals– The capture timer can sync with a PWM timer or external signals• Fault Detection module– Programmable fault handling in both cycle-by-cycle mode and one-shot mode– A fault condition can force the PWM output to either high or low logic levels• Event generation and task response achieved by the Event Task Matrix (ETM)For details, see ESP32-H2 Technical Reference Manual > Chapter Motor Control PWM (MCPWM).Pin AssignmentThe pins for the Motor Control PWM can be chosen from any GPIOs via the GPIO Matrix.For more information about the pin assignment, see Section 2.3 IO Pins andESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix.4.2.1.10 Remote Control PeripheralThe Remote Control Peripheral (RMT) controls the transmission and reception of infrared remote controlsignals.Feature List• Four channels for sending and receiving infrared remote control signals• Independent transmission and reception capabilities for each channel• Support for Normal TX/RX mode, Wrap TX/RX mode, Continuous TX mode• Modulation on TX pulses and Demodulation on RX pulses• RX filtering for improved signal reception• Ability to transmit data simultaneously on multiple channels• Clock divider counter, state machine, and transmitter for each TX channel• Clock divider counter, state machine, and receiver for each RX channel• Default allocation of RAM blocks to channels based on channel number• RAM containing 16-bit entries with “level” and “period” fieldsFor details, see ESP32-H2 Technical Reference Manual > Chapter Remote Control Peripheral (RMT).Pin AssignmentThe pins for the Remote Control Peripheral can be chosen from any GPIOs via the GPIO Matrix.Espressif Systems 46Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional DescriptionFor more information about the pin assignment, see Section 2.3 IO Pins andESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix.4.2.1.11 Parallel IO ControllerThe Parallel IO Controller (PARLIO) in the ESP32-H2 chip enables data transfer between external devices andinternal memory on a parallel bus through GDMA. It consists of a transmitter (TX unit) and a receiver (RX unit),making it a versatile interface for connecting various peripherals.Feature List• 1/2/4/8-bit configurable data bus width• Full-duplex communication with 8-bit data bus width• Bit reordering in 1/2/4-bit data bus width mode• RX unit supports eight receive modes categorized into three major categories: Level Enable mode, PulseEnable mode, and Software Enable mode• TX unit can generate a valid signal aligned with TXDFor details, see ESP32-H2 Technical Reference Manual > Chapter Parallel IO Controller.Pin AssignmentThe pins for the Parallel IO Controller can be chosen from any GPIOs via the GPIO Matrix.For more information about the pin assignment, see Section 2.3 IO Pins andESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix.4.2.2 Analog Signal ProcessingThis subsection describes components on the chip that sense and process real-world data.4.2.2.1 SAR ADCESP32-H2 integrates a Successive Approximation Analog-to-Digital Converter (SAR ADC) to convert analogsignals into digital representations.Feature List• 12-bit sampling resolution• Analog voltage sampling from up to five pins• Attenuation of input signals for voltage conversion• Software-triggered one-time sampling• Timer-triggered multi-channel scanning• DMA continuous conversion for seamless data transfer• Two filters with configurable filter coefficientEspressif Systems 47Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description• Threshold monitoring which helps to trigger an interrupt• Support for Event Task MatrixFor details, see ESP32-H2 Technical Reference Manual > Chapter SAR ADC and Temperature Sensor.Pin AssignmentThe pins for the SAR ADC are multiplexed with GPIO1 ~ GPIO5, JTAG interface, and SPI2 interface.For more information about the pin assignment, see Section 2.3 IO Pins andESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix.4.2.2.2 Temperature SensorThe Temperature Sensor in the ESP32-H2 chip allows for real-time monitoring of temperature changes inside thechip.Feature List• Measurement range: –40°C ~ 125°C• Software triggering, wherein the data can be read continuously once triggered• Hardware automatic triggering and temperature monitoring• Configurable temperature offset based on the environment to improve the accuracy• Adjustable measurement range• Two automatic monitoring wake-up modes: absolute value mode and incremental value mode• Support for Event Task MatrixFor details, see ESP32-H2 Technical Reference Manual > Chapter SAR ADC and Temperature Sensor.4.2.2.3 Analog PAD Voltage ComparatorESP32-H2 integrates two analog voltage comparators. These comparators rely on special pads that supportvoltage comparison functionality to monitor voltage changes on these pads. Each analog voltage comparatorhas two pads associated with it, for the main voltage and the reference voltage respectively. The voltagecomparison result generated by the analog voltage comparator can be used as Event Task Matrix (ETM) eventsto drive ETM tasks of other peripherals or trigger interrupts.Feature List• Voltage comparison– Configurable voltage comparison mode– Configurable reference voltage• Interrupt upon changes of voltage comparison result• ETM event generationEspressif Systems 48Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional DescriptionFor details, see ESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix > Function of AnalogPAD Voltage Comparator.Pin AssignmentThe pins for the analog voltage pad comparators are multiplexed with GPIO10 ~ GPIO11.For more details, see ESP32-H2 Technical Reference Manual > Chapter IO MUX and GPIO Matrix.Espressif Systems 49Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description4.3 Wireless CommunicationThis section describes the chip’s wireless communication capabilities, spanning radio technology, Bluetooth LowEnergy, and 802.15.4.4.3.1 RadioThis subsection describes the fundamental radio technology embedded in the chip that facilitates wirelesscommunication and data exchange.4.3.1.1 2.4 GHz ReceiverThe 2.4 GHz receiver demodulates the 2.4 GHz RF signal to baseband signals and converts them to the digitaldomain with two high-resolution ADCs. To adapt to varying signal channel conditions, ESP32-H2 integrates RFfilters, Automatic Gain Control (AGC), DC offset cancellation circuits, and baseband filters.4.3.1.2 2.4 GHz TransmitterThe 2.4 GHz transmitter modulates the baseband signals to the 2.4 GHz RF signal, and drives the antenna with aCMOS power amplifier.Additional calibrations are integrated to cancel any radio imperfections, such as:• Carrier leakage• I/Q amplitude/phase matchingThese built-in calibration routines reduce the cost, time, and specialized equipment required for producttesting.4.3.1.3 Clock GeneratorThe clock generator produces clock signals of 2.4 GHz for both the receiver and the transmitter. All componentsof the clock generator are integrated into the chip, including inductors, varactors, filters, regulators anddividers.The clock generator has built-in calibration and self-test circuits. Clock phases and phase noise are optimized onchip with patented calibration algorithms which ensure the best performance of the receiver and thetransmitter.4.3.2 Bluetooth LEESP32-H2 includes a Bluetooth Low Energy subsystem that integrates a link controller, an RF/modem block anda feature-rich software protocol stack. It supports the core features of Bluetooth 5 and Bluetooth mesh.4.3.2.1 Bluetooth LE PHYESP32-H2’s Bluetooth Low Energy PHY supports:• 1 Mbps PHY• 2 Mbps PHY for higher data ratesEspressif Systems 50Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description• Coded PHY for longer range (125 Kbps and 500 Kbps)• HW Listen before talk (LBT)4.3.2.2 Bluetooth LE Link ControllerESP32-H2’s Bluetooth Low Energy Link Controller supports:• LE advertising extensions, to enhance broadcasting capacity and broadcast more intelligent data• Multiple advertisement sets• Simultaneous advertising and scanning• Multiple connections in simultaneous central and peripheral roles• Adaptive frequency hopping and channel assessment• Channel selection algorithm #2• LE power control• Connection parameter update• High duty cycle non-connectable advertising• LE privacy 1.2• LE data packet length extension• Link layer extended scanner filter policies• Low duty cycle connectable directed advertising• Link layer encryption• LE Ping4.3.3 802.15.4ESP32-H2 includes an IEEE Standard 802.15.4 subsystem that integrates PHY and MAC layers. It supportsvarious software stacks including Thread, Zigbee, Matter, HomeKit, MQTT, and so on.4.3.3.1 802.15.4 PHYESP32-H2’s 802.15.4 PHY supports:• O-QPSK PHY in 2.4 GHz• 250 Kbps data rate• RSSI and LQI supported4.3.3.2 802.15.4 MACESP32-H2 supports most key features defined in IEEE Standard 802.15.4-2015, includes:• CSMA/CA• Active scan and energy detectEspressif Systems 51Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 4 Functional Description• HW frame filter• HW auto acknowledge• HW auto frame pending• Coordinated sampled listening (CSL)Espressif Systems 52Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 5 Electrical Characteristics5 Electrical Characteristics5.1 Absolute Maximum RatingsStresses above those listed in Table 5-1 Absolute Maximum Ratings may cause permanent damage to the device.These are stress ratings only and normal operation of the device at these or any other conditions beyond thoseindicated in Section 5.2 Recommended Operating Conditions is not implied. Exposure toabsolute-maximum-rated conditions for extended periods may affect device reliability.Table 5-1. Absolute Maximum RatingsParameter Description Min Max UnitInput power pins1Allowed input voltage –0.3 3.6 VIoutput2Cumulative IO output current — 1.3 ATST OREStorage temperature –40 150 °C1For more information on input power pins, see Section 2.5.1 Power Pins.2The product proved to be fully functional after all its IO pins were pulled high whilebeing connected to ground for 24 consecutive hours at ambient temperature of25 °C.5.2 Recommended Operating ConditionsTable 5-2. Recommended Operating ConditionsParameter1Description Min Typ Max UnitVDD3P3, VBAT, VDDA_PMU, VDDPST1, VDDPST22Recommended input voltage 3.0 3.3 3.6 VIV DDCumulative input current20.35 — — ATAAmbient temperature –40 — 105 °C1See in conjunction with Section 2.5 Power Supply.2If writing to eFuses, the voltage on its power supply pin VDDPST2 should not exceed 3.3 V as the circuits responsiblefor burning eFuses are sensitive to higher voltages.3If you use a single power supply, the recommended output current is 0.35 A or more.5.3 DC Characteristics (3.3 V, 25 °C)Table 5-3. DC Characteristics (3.3 V, 25 °C)Parameter Description Min Typ Max UnitCINPin capacitance — 2 — pFVIHHigh-level input voltage0.75 × VDD1— VDD1+ 0.3 VVILLow-level input voltage –0.3 —0.25 × VDD1VIIHHigh-level input current — — 50 nACont’d on next pageEspressif Systems 53Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 5 Electrical CharacteristicsTable 5-3 – cont’d from previous pageParameter Description Min Typ Max UnitIILLow-level input current — — 50 nAVOH2High-level output voltage 0.8 × VDD1— — VVOL2Low-level output voltage — — 0.1 × VDD1VIOHHigh-level source current (VDD1= 3.3 V, VOH>= 2.64 V, PAD_DRIVER = 3)— 40 — mAIOLLow-level sink current (VDD1= 3.3 V, VOL=0.495 V, PAD_DRIVER = 3)— 28 — mARP UInternal weak pull-up resistor — 45 — kΩRP DInternal weak pull-down resistor — 45 — kΩVIH_nRSTChip reset release voltage (CHIP_EN voltage iswithin the specified range)0.75 × VDD1— VDD1+ 0.3 VVIL _nRSTChip reset voltage (CHIP_EN voltage is withinthe specified range)–0.3 —0.25 × VDD1V1VDD – voltage from a power pin of a respective power domain.2VOHand VOLare measured using high-impedance load.5.4 ADC CharacteristicsThe measurements in this section are taken with an external 100 nF capacitor connected to the ADC, using DCsignals as input, 3.3 V voltage, and at an ambient temperature of 25 °C with the disabled modem.Table 5-4. ADC CharacteristicsSymbol Min Max UnitDNL (Differential nonlinearity)1–8 12 LSBINL (Integral nonlinearity) –10 10 LSBSampling rate — 100 kSPS21To get better DNL results, you can sample multiple times andapply a filter, or calculate the average value.2kSPS means kilo samples-per-second.The calibrated ADC results after hardware calibration and software calibration are shown in Table 5-5. For higheraccuracy, you may implement your own calibration methods.Table 5-5. ADC Calibration ResultsParameter Description Min Max UnitTotal errorATTEN0, effective measurement range of 0 ~ 1000 –7 7 mVATTEN1, effective measurement range of 0 ~ 1300 –8 8 mVATTEN2, effective measurement range of 0 ~ 1900 –12 12 mVATTEN3, effective measurement range of 0 ~ 3300 –23 23 mVEspressif Systems 54Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 5 Electrical CharacteristicsNote:The above ADC measurement range and accuracy are applicable to chips manufactured on and after the Date Code342023 on shielding cases, or assembled on and after the D/C 1 and D/C 2 2334 on bar-code labels. For chips manu-factured or assembled earlier than these date codes, please ask our sales team to provide the actual range and accuracyaccording to batch.For details of Date Code and D/C, please refer to Espressif Chip Packaging Information.5.5 Current Consumption5.5.1 RF Current Consumption in Active ModeThe current consumption measurements are taken with a 3.3 V supply at 25 °C of ambient temperature at the RFport. All transmitters’ measurements are based on a 100% duty cycle.Table 5-6. Bluetooth LE Current Consumption in Active ModeWork Mode Description Peak (mA)Active (RF working)TXBluetooth LE @ 20.0 dBm 140Bluetooth LE @ 9.0 dBm 60Bluetooth LE @ 0 dBm 36Bluetooth LE @ -24.0 dBm 24RX Bluetooth LE 24Table 5-7. 802.15.4 Current Consumption in Active ModeWork Mode Description Peak (mA)Active (RF working)TX802.15.4 @ 20.0 dBm 140802.15.4 @ 9.0 dBm 60802.15.4 @ 0 dBm 36802.15.4 @ –24.0 dBm 24RX 802.15.4 255.5.2 Current Consumption in Other ModesThe measurements below are applicable to ESP32-H2FH2S and ESP32-H2FH4S.Table 5-8. Current Consumption in Modem-sleep ModeWork modeFrequency(MHz)DescriptionTyp1(mA)All Peripheral Clocks DisabledTyp1(mA)All Peripheral Clocks EnabledModem-sleep296CPU running 10 17CPU in idle 6 1364CPU running 8 13CPU in idle 5 10Cont’d on next pageEspressif Systems 55Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 5 Electrical CharacteristicsTable 5-8 – cont’d from previous pageWork modeFrequency(MHz)DescriptionTyp1(mA)All Peripheral Clocks DisabledTyp1(mA)All Peripheral Clocks enabled48CPU running 7 11CPU in idle 5 932CPU running 4 8CPU in idle 3 71In practice, the current consumption might be different depending on which peripherals are enabled.2In Modem-sleep mode, the current consumption might be higher when accessing flash.Table 5-9. Current Consumption in Low-Power ModesWork mode Description Typ (µA)Light-sleepCPU and wireless communication modules are pow-ered down, peripheral clocks are disabled, and allGPIOs are high-impedance85CPU, wireless communication modules and periph-erals are powered down, and all GPIOs are high-impedance25Deep-sleep LP timer and LP memory are powered on 7Power off CHIP_EN is set to low level, the chip is powered off 15.6 ReliabilityTable 5-10. Reliability QualificationsTest Item Test Conditions Test StandardHTOL (High TemperatureOperating Life)125 °C, 1000 hours JESD22-A108ESD (Electro-StaticDischarge Sensitivity)HBM (Human Body Mode)1± 2000 V JS-001CDM (Charge Device Mode)2± 1000 V JS-002Latch upCurrent trigger ± 200 mAJESD78Voltage trigger 1.5 × VDDmaxPreconditioningBake 24 hours @125 °CMoisture soak (level 3: 192 hours @30 °C, 60% RH)IR reflow solder: 260 + 0 °C, 20 seconds, three timesJ-STD-020, JESD47,JESD22-A113TCT (Temperature CyclingTest)–65 °C / 150 °C, 500 cycles JESD22-A104uHAST (HighlyAccelerated Stress Test,unbiased)130 °C, 85% RH, 96 hours JESD22-A118Cont’d on next pageEspressif Systems 56Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 5 Electrical CharacteristicsTable 5-10 – cont’d from previous pageTest Item Test Conditions Test StandardHTSL (High TemperatureStorage Life)150 °C, 1000 hours JESD22-A103LTSL (Low TemperatureStorage Life)–40 °C, 1000 hours JESD22-A1191JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process.2JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.Espressif Systems 57Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 6 RF Characteristics6 RF CharacteristicsThis section contains tables with RF characteristics of the Espressif product.The RF data is measured at the antenna port, where RF cable is connected, including the front-end loss. Thefront-end circuit is a 0 Ω resistor.Devices should operate in the center frequency range allocated by regional regulatory authorities. The targetcenter frequency range and the target transmit power are configurable by software. See ESP RF Test Tool andTest Guide for instructions.Unless otherwise stated, the RF tests are conducted with a 3.3 V (±5%) supply at 25 ºC ambient temperature.6.1 Bluetooth LE RadioTable 6-1. Bluetooth LE RF CharacteristicsName DescriptionCenter frequency range of operating channel 2402 ~ 2480 MHzRF transmit power range –24.0 ~ 20.0 dBm6.1.1 Bluetooth LE RF Transmitter (TX) CharacteristicsTable 6-2. Bluetooth LE - Transmitter Characteristics - 1 MbpsParameter Description Min Typ Max UnitCarrier frequency offset and driftMax. |fn|n=0, 1, 2, 3, ...k— 1.5 — kHzMax. |f0 −fn|n=2, 3, 4, ...k— 2.8 — kHzMax. |fn −fn−5|n=6, 7, 8, ...k— 1.3 — kHz|f1 −f0| — 2.3 — kHzModulation characteristics∆ F 1avg— 251.8 — kHzMin. ∆ F 2max(for at least99.9% of all ∆ F 2max)— 217.0 — kHz∆ F 2avg/∆ F 1avg— 0.87 — —In-band emissions± 2 MHz offset — –28 — dBm± 3 MHz offset — –32 — dBm> ± 3 MHz offset — –34 — dBmTable 6-3. Bluetooth LE - Transmitter Characteristics - 2 MbpsParameter Description Min Typ Max UnitCarrier frequency offset and driftMax. |fn|n=0, 1, 2, 3, ...k— 3.3 — kHzMax. |f0 −fn|n=2, 3, 4, ...k— 3.3 — kHzMax. |fn −fn−5|n=6, 7, 8, ...k— 1.6 — kHz|f1 −f0| — 2.3 — kHzCont’d on next pageEspressif Systems 58Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 6 RF CharacteristicsTable 6-3 – cont’d from previous pageParameter Description Min Typ Max UnitModulation characteristics∆ F 1avg— 499.9 — kHzMin. ∆ F 2max(for at least99.9% of all ∆ F 2max)— 492.0 — kHz∆ F 2avg/∆ F 1avg— 0.90 — —In-band emissions± 4 MHz offset — –31 — dBm± 5 MHz offset — –34 — dBm> ± 5 MHz offset — –36 — dBmTable 6-4. Bluetooth LE - Transmitter Characteristics - 125 KbpsParameter Description Min Typ Max UnitCarrier frequency offset and driftMax. |fn|n=0, 1, 2, 3, ...k— 1.0 — kHzMax. |f0 −fn|n=1, 2, 3, ...k— 0.5 — kHz|f0 −f3| — 0.4 — kHzMax. |fn −fn−3|n=7, 8, 9, ...k— 0.9 — kHzModulation characteristics∆ F 1avg— 250.5 — kHzMin. ∆ F 1max(for at least99.9% of all ∆ F 1max)— 234.0 — kHzIn-band emissions± 2 MHz offset — –23 — dBm± 3 MHz offset — –34 — dBm> ± 3 MHz offset — –42 — dBmTable 6-5. Bluetooth LE - Transmitter Characteristics - 500 KbpsParameter Description Min Typ Max UnitCarrier frequency offset and driftMax. |fn|n=0, 1, 2, 3, ...k— 2.3 — kHzMax. |f0 −fn|n=1, 2, 3, ...k— 0.7 — kHz|f0 −f3| — 0.3 — kHzMax. |fn −fn−3|n=7, 8, 9, ...k— 1.1 — kHzModulation characteristics∆ F 2avg— 230.6 — kHzMin. ∆ F 2max(for at least99.9% of all ∆ F 2max)— 221.8 — kHzIn-band emissions± 2 MHz offset — –28 — dBm± 3 MHz offset — –33 — dBm> ± 3 MHz offset — –35 — dBmNote that the In-band emissions in Table 6-2 and Table 6-5 above are tested at 15 dBm of TX power. However,the test result still meets the Bluetooth SIG standard even if the TX power is increased up to 20 dBm.Espressif Systems 59Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 6 RF Characteristics6.1.2 Bluetooth LE RF Receiver (RX) CharacteristicsTable 6-6. Bluetooth LE - Receiver Characteristics - 1 MbpsParameter Description Min Typ Max UnitSensitivity @30.8% PER — — –99.0 — dBmMaximum received signal @30.8% PER — — 8 — dBmC/I and receiverselectivity performanceCo-channel F = F0 MHz — 4 — dBAdjacent channelF = F0 + 1 MHz — 2 — dBF = F0 – 1 MHz — 0 — dBF = F0 + 2 MHz — –29 — dBF = F0 – 2 MHz — –29 — dBF = F0 + 3 MHz — –35 — dBF = F0 – 3 MHz — –36 — dBF ≥ F0 + 4 MHz — –30 — dBF ≤ F0 – 4 MHz — –36 — dBImage frequency — — –35 — dBAdjacent channel toimage frequencyF = Fimage+ 1 MHz — –30 — dBF = Fimage– 1 MHz — –29 — dB30 MHz ~ 2000 MHz — –16 — dBmOut-of-band blocking performance2003 MHz ~ 2399 MHz — –12 — dBm2484 MHz ~ 2997 MHz — –16 — dBm3000 MHz ~ 12.75 GHz — 0 — dBmIntermodulation — — –35 — dBmTable 6-7. Bluetooth LE - Receiver Characteristics - 2 MbpsParameter Description Min Typ Max UnitSensitivity @30.8% PER — — –96.0 — dBmMaximum received signal @30.8% PER — — 8 — dBmC/I and receiverselectivity performanceCo-channel F = F0 MHz — 5 — dBAdjacent channelF = F0 + 2 MHz — 1 — dBF = F0 – 2 MHz — -2 — dBF = F0 + 4 MHz — –27 — dBF = F0 – 4 MHz — –32 — dBF = F0 + 6 MHz — –33 — dBF = F0 – 6 MHz — –36 — dBF ≥ F0 + 8 MHz — –36 — dBF ≤ F0 – 8 MHz — –36 — dBImage frequency — — –26 — dBAdjacent channel toimage frequencyF = Fimage+ 2 MHz — –30 — dBF = Fimage– 2 MHz — 3 — dB30 MHz ~ 2000 MHz — –17 — dBmOut-of-band blocking performance2003 MHz ~ 2399 MHz — –27 — dBm2484 MHz ~ 2997 MHz — –17 — dBmCont’d on next pageEspressif Systems 60Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 6 RF CharacteristicsTable 6-7 – cont’d from previous pageParameter Description Min Typ Max Unit3000 MHz ~ 12.75 GHz — 0 — dBmIntermodulation — — –27 — dBmTable 6-8. Bluetooth LE - Receiver Characteristics - 125 KbpsParameter Description Min Typ Max UnitSensitivity @30.8% PER — — –106.5 — dBmMaximum received signal @30.8% PER — — 8 — dBmC/I and receiverselectivity performanceCo-channel F = F0 MHz — 0 — dBAdjacent channelF = F0 + 1 MHz — –4 — dBF = F0 – 1 MHz — –6 — dBF = F0 + 2 MHz — –31 — dBF = F0 – 2 MHz — –34 — dBF = F0 + 3 MHz — –39 — dBF = F0 – 3 MHz — –48 — dBF ≥ F0 + 4 MHz — –35 — dBF ≤ F0 – 4 MHz — –48 — dBImage frequency — — –39 — dBAdjacent channel toimage frequencyF = Fimage+ 1 MHz — –35 — dBF = Fimage– 1 MHz — –31 — dBTable 6-9. Bluetooth LE - Receiver Characteristics - 500 KbpsParameter Description Min Typ Max UnitSensitivity @30.8% PER — — –102.5 — dBmMaximum received signal @30.8% PER — — 8 — dBmC/I and receiverselectivity performanceCo-channel F = F0 MHz — 2 — dBAdjacent channelF = F0 + 1 MHz — –1 — dBF = F0 – 1 MHz — –4 — dBF = F0 + 2 MHz — –28 — dBF = F0 – 2 MHz — –29 — dBF = F0 + 3 MHz — –38 — dBF = F0 – 3 MHz — –41 — dBF ≥ F0 + 4 MHz — –33 — dBF ≤ F0 – 4 MHz — –41 — dBImage frequency — — –38 — dBAdjacent channel toimage frequencyF = Fimage+ 1 MHz — –33 — dBF = Fimage– 1 MHz — –28 — dB6.2 802.15.4 RadioEspressif Systems 61Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 6 RF CharacteristicsTable 6-10. 802.15.4 RF CharacteristicsName Description1Center frequency range of operating channel 2405 ~ 2480 MHz1Zigbee in the 2.4 GHz range supports 16 channels at 5 MHz spacing fromchannel 11 to channel 26.6.2.1 802.15.4 RF Transmitter (TX) CharacteristicsTable 6-11. 802.15.4 Transmitter Characteristics - 250 KbpsParameter Min Typ Max UnitRF transmit power range –24.0 — 20.0 dBmEVM — 3.5% — —6.2.2 802.15.4 RF Receiver (RX) CharacteristicsTable 6-12. 802.15.4 Receiver Characteristics - 250 KbpsParameter Description Min Typ Max UnitSensitivity @1% PER — — –102.5 — dBmMaximum received signal @1% PER — — 8 — dBmRelative jamming levelAdjacent channelF = F0 + 5 MHz — 31 — dBF = F0 – 5 MHz — 43 — dBAlternate channelF = F0 + 10 MHz — 49 — dBF = F0 – 10 MHz — 54 — dBEspressif Systems 62Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 7 Packaging7 Packaging• For information about tape, reel, and chip marking, please refer to Espressif Chip Packaging Information.• The pins of the chip are numbered in anti-clockwise order starting from Pin 1 in the top view. For pinnumbers and pin names, see also Figure 2-1 ESP32-H2 Pin Layout (Top View).• The recommended land pattern source file (asc) is available for download. You can import the file withsoftware such as PADS and Altium Designer.Figure 7-1. QFN32 (4×4 mm) PackageEspressif Systems 63Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 Related Documentation and ResourcesRelated Documentation and ResourcesRelated Documentation• ESP32-H2 Technical Reference Manual – Detailed information on how to use the ESP32-H2 memory and peripherals.• ESP32-H2 Hardware Design Guidelines – Guidelines on how to integrate the ESP32-H2 into your hardware product.• ESP32-H2 Series SoC Errata – Descriptions of known errors in ESP32-H2 series of SoCs.• Certificateshttps://espressif.com/en/support/documents/certificates• ESP32-H2 Product/Process Change Notifications (PCN)https://espressif.com/en/support/documents/pcns?keys=ESP32-H2• ESP32-H2 Advisories – Information on security, bugs, compatibility, component reliability.https://espressif.com/en/support/documents/advisories?keys=ESP32-H2• Documentation Updates and Update Notification Subscriptionhttps://espressif.com/en/support/download/documentsDeveloper Zone• ESP-IDF Programming Guide for ESP32-H2 –Extensive documentation for the ESP-IDF development framework.• ESP-IDF and other development frameworks on GitHub.https://github.com/espressif• ESP32 BBS Forum – Engineer-to-Engineer (E2E) Community for Espressif products where you can post questions,share knowledge, explore ideas, and help solve problems with fellow engineers.https://esp32.com/• The ESP Journal – Best Practices, Articles, and Notes from Espressif folks.https://blog.espressif.com/• See the tabs SDKs and Demos, Apps, Tools, AT Firmware.https://espressif.com/en/support/download/sdks-demosProducts• ESP32-H2 Series SoCs – Browse through all ESP32-H2 SoCs.https://espressif.com/en/products/socs?id=ESP32-H2• ESP32-H2 Series Modules – Browse through all ESP32-H2-based modules.https://espressif.com/en/products/modules?id=ESP32-H2• ESP32-H2 Series DevKits – Browse through all ESP32-H2-based devkits.https://espressif.com/en/products/devkits?id=ESP32-H2• ESP Product Selector – Find an Espressif hardware product suitable for your needs by comparing or applying filters.https://products.espressif.com/#/product-selector?language=enContact Us• See the tabs Sales Questions, Technical Enquiries, Circuit Schematic & PCB Design Review, Get Samples(Online stores), Become Our Supplier, Comments & Suggestions.https://espressif.com/en/contact-us/sales-questionsEspressif Systems 64Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 Appendix A – ESP32-H2 Consolidated Pin OverviewAppendix A – ESP32-H2 Consolidated Pin OverviewPin Pin Pin Pin Providing Pin Settings Analog Function IO MUX FunctionNo. Name Type Power At Reset After Reset 0 1 0 Type 1 Type 2 Type 3 Type 4 Type1 VDD3P3 Power2 VDD3P3 Power3 GPIO0 IO VDDPST1 GPIO0 I/O/T GPIO0 I/O/T FSPIQ I1/O/T4 GPIO1 IO VDDPST1 ADC1_CH0 GPIO1 I/O/T GPIO1 I/O/T FSPICS0 I1/O/T5 MTMS IO VDDPST1 IE IE ADC1_CH1 MTMS I1 GPIO2 I/O/T FSPIWP I1/O/T6 MTDO IO VDDPST1 IE IE ADC1_CH2 MTDO O/T GPIO3 I/O/T FSPIHD I1/O/T7 MTCK IO VDDPST1 IE* ADC1_CH3 MTCK I1 GPIO4 I/O/T FSPICLK I1/O/T8 MTDI IO VDDPST1 IE ADC1_CH4 MTDI I1 GPIO5 I/O/T FSPID I1/O/T9 VDDPST1 Power10 GPIO8 IO VDDPST1 IE IE GPIO8 I/O/T GPIO8 I/O/T11 GPIO9 IO VDDPST1 IE, WPU IE, WPU GPIO9 I/O/T GPIO9 I/O/T12 GPIO10 IO VDDPST1 ZCD0 GPIO10 I/O/T GPIO10 I/O/T13 GPIO11 IO VDDPST1 ZCD1 GPIO11 I/O/T GPIO11 I/O/T14 GPIO12 IO VDDA_PMU/VBAT GPIO12 I/O/T GPIO12 I/O/T15 XTAL_32K_P IO VDDA_PMU/VBAT XTAL_32K_P GPIO13 I/O/T GPIO13 I/O/T16 XTAL_32K_N IO VDDA_PMU/VBAT XTAL_32K_N GPIO14 I/O/T GPIO14 I/O/T17 CHIP_EN Analog VBAT18 VBAT Power19 VDDA_PMU Power20 VDDPST2 Power21 GPIO22 IO VDDPST2 GPIO22 I/O/T GPIO22 I/O/T22 U0RXD IO VDDPST2 IE, WPU U0RXD I1 GPIO23 I/O/T FSPICS1 O/T23 U0TXD IO VDDPST2 IE, WPU U0TXD O GPIO24 I/O/T FSPICS2 O/T24 GPIO25 IO VDDPST2 IE IE GPIO25 I/O/T GPIO25 I/O/T FSPICS3 O/T25 GPIO26 IO VDDPST2 IE USB_D- GPIO26 I/O/T GPIO26 I/O/T FSPICS4 O/T26 GPIO27 IO VDDPST2 IE, USB_PU USB_D+ GPIO27 I/O/T GPIO27 I/O/T FSPICS5 O/T27 VDD3P3 Power28 XTAL_N Analog29 XTAL_P Analog30 VDD3P3 Power31 VDD3P3 Power32 ANT Analog33 GND Power*For details, see Section 2 Pins. Regarding highlighted cells, see Section 2.3.3 Restrictions for GPIOs.Espressif Systems 65Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 Datasheet VersioningDatasheet VersioningDatasheetVersionStatus Watermark Definitionv0.1 ~ v0.5(excluding v0.5)Draft ConfidentialThis datasheet is under development for products inthe design stage. Specifications may change withoutprior notice.v0.5 ~ v1.0(excluding v1.0)PreliminaryreleasePreliminaryThis datasheet is actively updated for products in theverification stage. Specifications may change beforemass production, and the changes will bedocumentation in the datasheet’s Revision History.v1.0 and higher Official release —This datasheet is publicly released for products inmass production. Specifications are finalized, andmajor changes will be communicated via ProductChange Notifications (PCN).Any version —NotRecommendedfor New Design(NRND)1This datasheet is updated less frequently forproducts not recommended for new designs.Any version —End of Life(EOL)2This datasheet is no longer mtained for products thathave reached end of life.1Watermark will be added to the datasheet title page only when all the product variants covered by this datasheetare not recommended for new designs.2Watermark will be added to the datasheet title page only when all the product variants covered by this datasheethave reached end of life.Espressif Systems 66Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 Revision HistoryRevision HistoryDate Version Release notes2025-10-13 v1.2• Updated Figure 3-1 Visualization of Timing Parameters for the Strapping Pins• Updated Section 4.1.3.6 Power Management Unit• Updated Section 4.2.2.1 SAR ADC• Updated Table 5-2 Recommended Operating Conditions• Added Section 7 Datasheet Versioning2025-02-28 v1.1• Improved CoreMark scores in Section CPU and Memory• Updated the description of internal slow RC oscillator in Section 4.1.3.3Clock• Added a note below Table 5-2 Recommended Operating Conditions• Updated the ordering code in Table 1-1 ESP32-H2 Series Comparison• Updated or added the following sections based on chip revision v1.2:– Updated sections 4.1.4.1 AES Accelerator, 4.1.4.7 Elliptic Curve DigitalSignature Algorithm (ECDSA), and 4.1.4.8 External Memory Encryptionand Decryption– Added Section 4.1.4.10 Power Glitch Detector2024-09-27 v1.0• Official release• Improved the content, formatting, structure, and wording of the whole doc-ument2023-10-17 v0.7• Added Section 4.5• Updated the description in Section 3.5.1• Updated measurements in Table 4-92023-08-02 v0.6• Updated the description in Section 2.4.1• Updated the note about USB under Table 3-1• Updated the description in Section 3.2• Updated the list of peripherals that support ETM in Section 3.5.10• Reordered the table content in Table 4-9 from the highest CPU frequencyto lowest CPU frequency;• Updated all the measurements in Table 4-9 and Table 4-10 to integers• Added two notes in Chapter 62023-05-24 v0.5 Preliminary releaseEspressif Systems 67Submit Documentation FeedbackESP32-H2 Series Datasheet v1.2 Disclaimer and Copyright NoticeInformation in this document, including URL references, is subject to change without notice.ALL THIRD PARTY’S INFORMATION IN THIS DOCUMENT IS PROVIDED AS IS WITH NO WARRANTIES TO ITS AUTHENTICITY ANDACCURACY.NO WARRANTY IS PROVIDED TO THIS DOCUMENT FOR ITS MERCHANTABILITY, NON-INFRINGEMENT, FITNESS FOR ANYPARTICULAR PURPOSE, NOR DOES ANY WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE.All liability, including liability for infringement of any proprietary rights, relating to use of information in this document is disclaimed. No licensesexpress or implied, by estoppel or otherwise, to any intellectual property rights are granted herein.The Wi-Fi Alliance Member logo is a trademark of the Wi-Fi Alliance. The Bluetooth logo is a registered trademark of Bluetooth SIG.All trade names, trademarks and registered trademarks mentioned in this document are property of their respective owners, and are herebyacknowledged.Copyright © 2025 Espressif Systems (Shanghai) Co., Ltd. All rights reserved.www.espressif.com