ESP Hardware Design Guidelines Choose target... Choose version... About This Document Product Overview Schematic Checklist PCB Layout Design Download Guidelines Related Documentation and Resources Glossary Revision History Disclaimer and Copyright Notice ESP Hardware Design Guidelines ESP Hardware Design Guidelines Download PDF ESP Hardware Design Guidelines [中文] This document provides guidelines for the ESP32-C3 SoC. To switch to another chip, use the drop-down menu at the top left of the page. Schematic Checklist PCB Layout Design Download Guidelines Resources Latest Version of This Document The document you are reading is the latest version. The full history of releases can be found in Section Revision History. Next Suggestion on this document? Provide feedback Help improve this document? Edit on GitHub Need more information? Check ESP forum Sales Questions Technical Inquiries © Copyright 2023 - 2026, Espressif Systems (Shanghai) Co., Ltd Built with Sphinx using a theme based on Read the Docs Sphinx Theme. ESP Hardware Design Guidelines Choose target... Choose version... About This Document Product Overview Schematic Checklist PCB Layout Design Download Guidelines Related Documentation and Resources Glossary Revision History Disclaimer and Copyright Notice ESP Hardware Design Guidelines Revision History Download PDF Revision History [中文] Revision History Date Version Release Notes 2025-06-05 v1.8 PCB Layout Design Section USB: Updated descriptions about the USB layout guidelines 2025-05-23 v1.7 PCB Layout Design Section Crystal: Updated descriptions about the crystal layout guidelines 2025-01-07 v1.6 ESP32-C3 Modules： Added download links to module reference designs 2024-11-15 v1.5 Schematic Checklist Section SPI: Newly added section 2024-10-15 v1.4 Schematic Checklist Section UART: Updated the AT related description 2024-02-18 v1.3 PCB Layout Design Section General Principles of PCB Layout for Modules (Positioning a Module on a Base Board): Updated Figure Placement of ESP32-C3 Modules on Base Board (antenna feed point on the right) and Figure Placement of ESP32-C3 Modules on Base Board (antenna feed point on the left) 2024-01-09 v1.2 Schematic Checklist Section RF Tuning: Updated RF matching description 2023-12-25 v1.1 PCB Layout Design Section Crystal: Updated crystal PCB layout 2023-12-22 v1.0 Migrated ESP32-C3 Hardware Design Guidelines from PDF to HTML format. During the migration from PDF to HTML format, minor updates, improvements, and clarifications were made throughout the documentation. If you would like to check previous versions of the document, please submit documentation feedback. Next Previous Suggestion on this document? Provide feedback Help improve this document? Edit on GitHub Need more information? Check ESP forum Sales Questions Technical Inquiries © Copyright 2023 - 2026, Espressif Systems (Shanghai) Co., Ltd Built with Sphinx using a theme based on Read the Docs Sphinx Theme. ESP Hardware Design Guidelines Choose target... Choose version... About This Document Product Overview Schematic Checklist PCB Layout Design Download Guidelines Related Documentation and Resources Glossary Revision History Disclaimer and Copyright Notice ESP Hardware Design Guidelines Product Overview Download PDF Product Overview [中文] ESP32-C3 is a system on a chip that integrates the following features: Wi-Fi (2.4 GHz band) Bluetooth® 5 (LE) High performance 32-bit RISC-V single-core processor Multiple peripherals Built-in security hardware Powered by 40 nm technology, ESP32-C3 provides a robust, highly-integrated platform, which helps meet the continuous demands for efficient power usage, compact design, security, high performance, and reliability. Typical application scenarios for ESP32-C3 include: Smart Home Industrial Automation Health Care Consumer Electronics Smart Agriculture POS Machines Service Robot Audio Devices Generic Low-power IoT Sensor Hubs Generic Low-power IoT Data Loggers For more information about ESP32-C3, please refer to ESP32-C3 Series Datasheet. Note Unless otherwise specified, “ESP32-C3” used in this document refers to the series of chips, instead of a specific chip variant. Next Previous Suggestion on this document? Provide feedback Help improve this document? Edit on GitHub Need more information? Check ESP forum Sales Questions Technical Inquiries © Copyright 2023 - 2026, Espressif Systems (Shanghai) Co., Ltd Built with Sphinx using a theme based on Read the Docs Sphinx Theme. ESP Hardware Design Guidelines Choose target... Choose version... About This Document Product Overview Schematic Checklist PCB Layout Design Download Guidelines Related Documentation and Resources Glossary Revision History Disclaimer and Copyright Notice ESP Hardware Design Guidelines Glossary Download PDF Glossary [中文] The glossary contains terms and acronyms that are used in this document. Term Description CLC Capacitor-Inductor-Capacitor DDR SDRAM Double Data Rate Synchronous Dynamic Random-Access Memory ESD Electrostatic Discharge LC Inductor-Capacitor PA Power Amplifier RC Resistor-Capacitor RTC Real-Time Clock Zero-ohm resistor A zero-ohm resistor acts as a placeholder in the circuit, allowing for the replacement with a higher-ohm resistor based on specific design requirements. Next Previous Suggestion on this document? Provide feedback Help improve this document? Edit on GitHub Need more information? Check ESP forum Sales Questions Technical Inquiries © Copyright 2023 - 2026, Espressif Systems (Shanghai) Co., Ltd Built with Sphinx using a theme based on Read the Docs Sphinx Theme. ESP Hardware Design Guidelines Choose target... Choose version... About This Document Product Overview Schematic Checklist PCB Layout Design Download Guidelines Related Documentation and Resources Glossary Revision History Disclaimer and Copyright Notice Terms of Use for Reference Designs ESP Hardware Design Guidelines Disclaimer and Copyright Notice Download PDF Disclaimer and Copyright Notice [中文] Information in this document, including URL references, is subject to change without notice. All third party’s information in this document is provided as is with no warranties to its authenticity and accuracy. No warranty is provided to this document for its merchantability, non-infringement, fitness for any particular purpose, nor does any warranty otherwise arising out of any proposal, specification or sample. All liability, including liability for infringement of any proprietary rights, relating to use of information in this document is disclaimed. No licenses express or implied, by estoppel or otherwise, to any intellectual property rights are granted herein. The Wi-Fi Alliance Member logo is a trademark of the Wi-Fi Alliance. The Bluetooth logo is a registered trademark of Bluetooth SIG. All trade names, trademarks and registered trademarks mentioned in this document are property of their respective owners, and are hereby acknowledged. Terms of Use for Reference Designs The module reference designs provided in this documentation are open-source materials and may be used in product development, including commercial applications, provided that appropriate product verification and testing are carried out prior to use. Use of these reference designs does not grant any rights to use Espressif’s trademarks. In particular: Prior to incorporating a reference design into a product, any Espressif trademarks appearing on the PCB silkscreen, such as the Espressif logo or module part numbers, must be replaced with the manufacturer’s own markings. Where the schematics or PCB layout are modified and the resulting design is released for commercial use, all Espressif trademarks and other proprietary markings must likewise be removed from the released schematics and PCB files. Previous Suggestion on this document? Provide feedback Help improve this document? Edit on GitHub Need more information? Check ESP forum Sales Questions Technical Inquiries © Copyright 2023 - 2026, Espressif Systems (Shanghai) Co., Ltd Built with Sphinx using a theme based on Read the Docs Sphinx Theme. ESP Hardware Design Guidelines Choose target... Choose version... About This Document Product Overview Schematic Checklist Overview Power Supply Digital Power Supply Analog Power Supply RTC Power Supply Chip Power-up and Reset Timing Flash Clock Source External Crystal Clock Source (Compulsory) RTC Clock Source (Optional) RF RF Circuit RF Tuning UART SPI Strapping Pins GPIO ADC USB PCB Layout Design Download Guidelines Related Documentation and Resources Glossary Revision History Disclaimer and Copyright Notice ESP Hardware Design Guidelines Schematic Checklist Download PDF Schematic Checklist [中文] Overview The integrated circuitry of ESP32-C3 requires only 20 electrical components (resistors, capacitors, and inductors) and a crystal, as well as an SPI flash. The high integration of ESP32-C3 allows for simple peripheral circuit design. This chapter details the schematic design of ESP32-C3. The following figure shows a reference schematic design of ESP32-C3. It can be used as the basis of your schematic design. ESP32-C3 Reference Schematic Any basic ESP32-C3 circuit design may be broken down into the following major building blocks: Power supply Chip power-up and reset timing Flash Clock source RF UART SPI Strapping pins GPIO ADC USB The rest of this chapter details the specifics of circuit design for each of these sections. Power Supply The general recommendations for power supply design are: When using a single power supply, the recommended power supply voltage is 3.3 V and the output current is no less than 500 mA. It is suggested to add an ESD protection diode and at least 10 μF capacitor at the main power entrance (where the external power supply enters the PCB). The power scheme is shown in ESP32-C3 Series Datasheet > Figure ESP32-C3 Power Scheme. More information about power supply pins can be found in ESP32-C3 Series Datasheet > Section Power Supply.