ESP Chip Errata Choose target... Choose version... ESP32-C6 Series SoC Errata Chip Revision Identification Errata Summary All Errata Descriptions Errata Descriptions by Chip Revisions Revision History Resources and Legal Notices Related Documentation and Resources Disclaimer and Copyright Notice ESP Chip Errata ESP32-C6 Series SoC Errata Download PDF ESP32-C6 Series SoC Errata [中文] This document describes known errata in ESP32-C6 series of SoCs. It consists of the following major chapters: Chip Revision Identification Introduces how to identify a specific ESP32-C6 chip revision, or a batch of chips and products built around the ESP32-C6 chips which contains error fixes described in this document. Errata Summary Overview of all bugs and their affected chip revisions. All Errata Descriptions Detailed bug descriptions, including conditions, expected behaviors and actual behaviors, causes, influences on users, workarounds, and solutions. Errata Descriptions by Chip Revisions Classification of bug descriptions by chip revisions. Revision History The release notes for this document. To switch to another chip, use the drop-down menu at the top left of the page. Next Suggestion on this document? Provide feedback Help improve this document? Edit on GitHub Need more information? Check ESP forum Sales Questions Technical Inquiries © Copyright 2024 - 2026, Espressif Systems (Shanghai) Co., Ltd Built with Sphinx using a theme based on Read the Docs Sphinx Theme. ESP Chip Errata Choose target... Choose version... ESP32-C6 Series SoC Errata Chip Revision Identification Errata Summary All Errata Descriptions Errata Descriptions by Chip Revisions v0.0 (9) v0.1 (7) [CLK-8588] 32 kHz Internal Slow RC Oscillator May Fail to Oscillate [ADC-305] Data Duplication May Occur When SAR ADC Accessing GDMA [ADC-1477] Loss of Precision in Lower Four Bits of SAR ADC [SPI-304] Enabling Flash Auto Suspend May Cause Abnormalities in Data Read [WIFI-9686] ESP32-C6 Cannot Be 802.11mc FTM Initiator [CPU-206] Possible Deadlock Due to Out-of-Order Execution of Instructions When Writing to LP SRAM Is Involved [RMT-176] The Idle State Signal Level Might Run into Error in RMT Continuous TX Mode v0.2 (2) Revision History Resources and Legal Notices Related Documentation and Resources Disclaimer and Copyright Notice ESP Chip Errata Errata Descriptions by Chip Revisions Chip Revision: v0.1 Download PDF Chip Revision: v0.1 Known Errors [CLK-8588] 32 kHz Internal Slow RC Oscillator May Fail to Oscillate [ADC-305] Data Duplication May Occur When SAR ADC Accessing GDMA [ADC-1477] Loss of Precision in Lower Four Bits of SAR ADC [SPI-304] Enabling Flash Auto Suspend May Cause Abnormalities in Data Read [WIFI-9686] ESP32-C6 Cannot Be 802.11mc FTM Initiator [CPU-206] Possible Deadlock Due to Out-of-Order Execution of Instructions When Writing to LP SRAM Is Involved [RMT-176] The Idle State Signal Level Might Run into Error in RMT Continuous TX Mode Next Previous Suggestion on this document? Provide feedback Help improve this document? Edit on GitHub Need more information? Check ESP forum Sales Questions Technical Inquiries © Copyright 2024 - 2026, Espressif Systems (Shanghai) Co., Ltd Built with Sphinx using a theme based on Read the Docs Sphinx Theme. ESP Chip Errata Choose target... Choose version... ESP32-C6 Series SoC Errata Chip Revision Identification Errata Summary All Errata Descriptions Errata Descriptions by Chip Revisions Revision History Resources and Legal Notices Related Documentation and Resources Related Documentation Developer Zone Products Contact Us Disclaimer and Copyright Notice ESP Chip Errata Related Documentation and Resources Download PDF Related Documentation and Resources [中文] Related Documentation ESP32-C6 Datasheet – Specifications of the ESP32-C6 hardware. ESP32-C6 Technical Reference Manual – Detailed information on how to use the ESP32-C6 memory and peripherals. ESP32-C6 Hardware Design Guidelines – Guidelines on how to integrate the ESP32-C6 into your hardware product. Certificates https://espressif.com/en/support/documents/certificates ESP32-C6 Product/Process Change Notifications (PCN) https://espressif.com/en/support/documents/pcns?keys=ESP32-C6 ESP32-C6 Advisories – Information on security, bugs, compatibility, component reliability. https://espressif.com/en/support/documents/advisories?keys=ESP32-C6 Documentation Updates and Update Notification Subscription https://espressif.com/en/support/download/documents Developer Zone ESP-IDF Programming Guide for ESP32-C6 – Extensive documentation for the ESP-IDF development framework. ESP-IDF and other development frameworks on GitHub. https://github.com/espressif ESP32 BBS Forum – Engineer-to-Engineer (E2E) Community for Espressif products where you can post questions, share knowledge, explore ideas, and help solve problems with fellow engineers. https://esp32.com/ The ESP Journal – Best Practices, Articles, and Notes from Espressif folks. https://blog.espressif.com/ See the tabs SDKs and Demos, Apps, Tools, AT Firmware. https://espressif.com/en/support/download/sdks-demos Products ESP32-C6 Series SoCs – Browse through all ESP32-C6 SoCs. https://espressif.com/en/products/socs?id=ESP32-C6 ESP32-C6 Series Modules – Browse through all ESP32-C6-based modules. https://espressif.com/en/products/modules?id=ESP32-C6 ESP32-C6 Series DevKits – Browse through all ESP32-C6-based devkits. https://espressif.com/en/products/devkits?id=ESP32-C6 ESP Product Selector – Find an Espressif hardware product suitable for your needs by comparing or applying filters. https://products.espressif.com/#/product-selector Contact Us See the tabs Sales Questions, Technical Enquiries, Circuit Schematic & PCB Design Review, Get Samples (Online stores), Become Our Supplier, Comments & Suggestions. https://espressif.com/en/contact-us/sales-questions Next Previous Suggestion on this document? Provide feedback Help improve this document? Edit on GitHub Need more information? Check ESP forum Sales Questions Technical Inquiries © Copyright 2024 - 2026, Espressif Systems (Shanghai) Co., Ltd Built with Sphinx using a theme based on Read the Docs Sphinx Theme. ESP Chip Errata Choose target... Choose version... ESP32-C6 Series SoC Errata Chip Revision Identification Errata Summary All Errata Descriptions Errata Descriptions by Chip Revisions v0.0 (9) v0.1 (7) v0.2 (2) Revision History Resources and Legal Notices Related Documentation and Resources Disclaimer and Copyright Notice ESP Chip Errata Errata Descriptions by Chip Revisions Download PDF Errata Descriptions by Chip Revisions Chip Revision v0.0 (9) v0.1 (7) v0.2 (2) Next Previous Suggestion on this document? Provide feedback Help improve this document? Edit on GitHub Need more information? Check ESP forum Sales Questions Technical Inquiries © Copyright 2024 - 2026, Espressif Systems (Shanghai) Co., Ltd Built with Sphinx using a theme based on Read the Docs Sphinx Theme. ESP Chip Errata Choose target... Choose version... ESP32-C6 Series SoC Errata Chip Revision Identification Errata Summary All Errata Descriptions Errata Descriptions by Chip Revisions v0.0 (9) v0.1 (7) [CLK-8588] 32 kHz Internal Slow RC Oscillator May Fail to Oscillate [ADC-305] Data Duplication May Occur When SAR ADC Accessing GDMA Description Workarounds Solution [ADC-1477] Loss of Precision in Lower Four Bits of SAR ADC [SPI-304] Enabling Flash Auto Suspend May Cause Abnormalities in Data Read [WIFI-9686] ESP32-C6 Cannot Be 802.11mc FTM Initiator [CPU-206] Possible Deadlock Due to Out-of-Order Execution of Instructions When Writing to LP SRAM Is Involved [RMT-176] The Idle State Signal Level Might Run into Error in RMT Continuous TX Mode v0.2 (2) Revision History Resources and Legal Notices Related Documentation and Resources Disclaimer and Copyright Notice ESP Chip Errata Errata Descriptions by Chip Revisions Chip Revision: v0.0 [ADC-305] Data Duplication May Occur When SAR ADC Accessing GDMA Download PDF [ADC-305] Data Duplication May Occur When SAR ADC Accessing GDMA Affected revisions: v0.0 v0.1 Description When the SAR ADC accesses the DMA, if the clock frequency of AHB_CLK and APB_CLK are different, multiple DMA access will be triggered. The number of repeated access is directly proportional to the frequency ratio, resulting in the same data being stored repeatedly and wasting storage space. Workarounds When using the SAR ADC, divide AHB_CLK by 1 to generate APB_CLK (configure the PCR_APB_DIV_NUM field to 0, which is the default value). Solution Fixed in chip revision v0.2. Next Previous Suggestion on this document? Provide feedback Help improve this document? Edit on GitHub Need more information? Check ESP forum Sales Questions Technical Inquiries © Copyright 2024 - 2026, Espressif Systems (Shanghai) Co., Ltd Built with Sphinx using a theme based on Read the Docs Sphinx Theme. ESP Chip Errata Choose target... Choose version... ESP32-C6 Series SoC Errata Chip Revision Identification Errata Summary All Errata Descriptions Errata Descriptions by Chip Revisions v0.0 (9) v0.1 (7) [CLK-8588] 32 kHz Internal Slow RC Oscillator May Fail to Oscillate [ADC-305] Data Duplication May Occur When SAR ADC Accessing GDMA [ADC-1477] Loss of Precision in Lower Four Bits of SAR ADC [SPI-304] Enabling Flash Auto Suspend May Cause Abnormalities in Data Read [WIFI-9686] ESP32-C6 Cannot Be 802.11mc FTM Initiator [CPU-206] Possible Deadlock Due to Out-of-Order Execution of Instructions When Writing to LP SRAM Is Involved Description Workarounds Solution [RMT-176] The Idle State Signal Level Might Run into Error in RMT Continuous TX Mode v0.2 (2) Revision History Resources and Legal Notices Related Documentation and Resources Disclaimer and Copyright Notice ESP Chip Errata Errata Descriptions by Chip Revisions Chip Revision: v0.0 [CPU-206] Possible Deadlock Due to Out-of-Order Execution of Instructions When Writing to LP SRAM Is Involved Download PDF [CPU-206] Possible Deadlock Due to Out-of-Order Execut