ESP Chip Errata Choose target... Choose version... ESP32-C3 Series SoC Errata Chip Revision Identification Errata Summary All Errata Descriptions Errata Descriptions by Chip Revisions Revision History Resources and Legal Notices Related Documentation and Resources Disclaimer and Copyright Notice ESP Chip Errata ESP32-C3 Series SoC Errata Download PDF ESP32-C3 Series SoC Errata [中文] This document describes known errata in ESP32-C3 series of SoCs. It consists of the following major chapters: Chip Revision Identification Introduces how to identify a specific ESP32-C3 chip revision, or a batch of chips and products built around the ESP32-C3 chips which contains error fixes described in this document. Errata Summary Overview of all bugs and their affected chip revisions. All Errata Descriptions Detailed bug descriptions, including conditions, expected behaviors and actual behaviors, causes, influences on users, workarounds, and solutions. Errata Descriptions by Chip Revisions Classification of bug descriptions by chip revisions. Revision History The release notes for this document. To switch to another chip, use the drop-down menu at the top left of the page. Next Suggestion on this document? Provide feedback Help improve this document? Edit on GitHub Need more information? Check ESP forum Sales Questions Technical Inquiries © Copyright 2024 - 2026, Espressif Systems (Shanghai) Co., Ltd Built with Sphinx using a theme based on Read the Docs Sphinx Theme. ESP Chip Errata Choose target... Choose version... ESP32-C3 Series SoC Errata Chip Revision Identification Errata Summary All Errata Descriptions Errata Descriptions by Chip Revisions v0.0 (2) v0.1 (2) v0.2 (2) [ADC-270] SAR ADC Cannot Sample Sufficient Data in DMA Continuous Conversion Mode After Restart [ADC-183] The Digital Controller (DMA) of SAR ADC2 Cannot Work v0.3 (2) v0.4 (2) v1.1 (2) Revision History Resources and Legal Notices Related Documentation and Resources Disclaimer and Copyright Notice ESP Chip Errata Errata Descriptions by Chip Revisions Chip Revision: v0.2 Download PDF Chip Revision: v0.2 Known Errors [ADC-270] SAR ADC Cannot Sample Sufficient Data in DMA Continuous Conversion Mode After Restart [ADC-183] The Digital Controller (DMA) of SAR ADC2 Cannot Work Next Previous Suggestion on this document? Provide feedback Help improve this document? Edit on GitHub Need more information? Check ESP forum Sales Questions Technical Inquiries © Copyright 2024 - 2026, Espressif Systems (Shanghai) Co., Ltd Built with Sphinx using a theme based on Read the Docs Sphinx Theme. ESP Chip Errata Choose target... Choose version... ESP32-C3 Series SoC Errata Chip Revision Identification Errata Summary All Errata Descriptions Errata Descriptions by Chip Revisions Revision History Resources and Legal Notices Related Documentation and Resources Related Documentation Developer Zone Products Contact Us Disclaimer and Copyright Notice ESP Chip Errata Related Documentation and Resources Download PDF Related Documentation and Resources [中文] Related Documentation ESP32-C3 Datasheet – Specifications of the ESP32-C3 hardware. ESP32-C3 Technical Reference Manual – Detailed information on how to use the ESP32-C3 memory and peripherals. ESP32-C3 Hardware Design Guidelines – Guidelines on how to integrate the ESP32-C3 into your hardware product. Certificates https://espressif.com/en/support/documents/certificates ESP32-C3 Product/Process Change Notifications (PCN) https://espressif.com/en/support/documents/pcns?keys=ESP32-C3 ESP32-C3 Advisories – Information on security, bugs, compatibility, component reliability. https://espressif.com/en/support/documents/advisories?keys=ESP32-C3 Documentation Updates and Update Notification Subscription https://espressif.com/en/support/download/documents Developer Zone ESP-IDF Programming Guide for ESP32-C3 – Extensive documentation for the ESP-IDF development framework. ESP-IDF and other development frameworks on GitHub. https://github.com/espressif ESP32 BBS Forum – Engineer-to-Engineer (E2E) Community for Espressif products where you can post questions, share knowledge, explore ideas, and help solve problems with fellow engineers. https://esp32.com/ The ESP Journal – Best Practices, Articles, and Notes from Espressif folks. https://blog.espressif.com/ See the tabs SDKs and Demos, Apps, Tools, AT Firmware. https://espressif.com/en/support/download/sdks-demos Products ESP32-C3 Series SoCs – Browse through all ESP32-C3 SoCs. https://espressif.com/en/products/socs?id=ESP32-C3 ESP32-C3 Series Modules – Browse through all ESP32-C3-based modules. https://espressif.com/en/products/modules?id=ESP32-C3 ESP32-C3 Series DevKits – Browse through all ESP32-C3-based devkits. https://espressif.com/en/products/devkits?id=ESP32-C3 ESP Product Selector – Find an Espressif hardware product suitable for your needs by comparing or applying filters. https://products.espressif.com/#/product-selector Contact Us See the tabs Sales Questions, Technical Enquiries, Circuit Schematic & PCB Design Review, Get Samples (Online stores), Become Our Supplier, Comments & Suggestions. https://espressif.com/en/contact-us/sales-questions Next Previous Suggestion on this document? Provide feedback Help improve this document? Edit on GitHub Need more information? Check ESP forum Sales Questions Technical Inquiries © Copyright 2024 - 2026, Espressif Systems (Shanghai) Co., Ltd Built with Sphinx using a theme based on Read the Docs Sphinx Theme. ESP Chip Errata Choose target... Choose version... ESP32-C3 Series SoC Errata Chip Revision Identification Errata Summary All Errata Descriptions Errata Descriptions by Chip Revisions v0.0 (2) v0.1 (2) v0.2 (2) v0.3 (2) v0.4 (2) v1.1 (2) [ADC-270] SAR ADC Cannot Sample Sufficient Data in DMA Continuous Conversion Mode After Restart [ADC-183] The Digital Controller (DMA) of SAR ADC2 Cannot Work Description Workarounds Solution Revision History Resources and Legal Notices Related Documentation and Resources Disclaimer and Copyright Notice ESP Chip Errata Errata Descriptions by Chip Revisions Chip Revision: v0.0 [ADC-183] The Digital Controller (DMA) of SAR ADC2 Cannot Work Download PDF [ADC-183] The Digital Controller (DMA) of SAR ADC2 Cannot Work Affected revisions: v0.0 v0.1 v0.2 v0.3 v0.4 v1.1 Description The Digital Controller of SAR ADC2, i.e., DIG ADC2 controller, may receive a false sampling enable signal. In such a case, the controller will enter an inoperative state. Workarounds It is suggested to use SAR ADC1. Solution No fix scheduled. Next Previous Suggestion on this document? Provide feedback Help improve this document? Edit on GitHub Need more information? Check ESP forum Sales Questions Technical Inquiries © Copyright 2024 - 2026, Espressif Systems (Shanghai) Co., Ltd Built with Sphinx using a theme based on Read the Docs Sphinx Theme. ESP Chip Errata Choose target... Choose version... ESP32-C3 Series SoC Errata Chip Revision Identification Chip Revision Numbering Scheme Primary Identification Methods eFuse Bits Chip Marking Module Marking Additional Identification Methods Date Code PW Number ESP-IDF Release Compatibility Related Documents Errata Summary All Errata Descriptions Errata Descriptions by Chip Revisions Revision History Resources and Legal Notices Related Documentation and Resources Disclaimer and Copyright Notice ESP Chip Errata Chip Revision Identification Download PDF Chip Revision Identification [中文] Espressif is introducing a new vM.X numbering scheme to indicate chip revisions. This guide outlines the structure of this scheme and provides information on chip errata and additional identification methods. Chip Revision Numbering Scheme The new numbering scheme vM.X consists of the major and minor numbers described below. M – Major number, indicating the major revision of the chip product. If this number changes, it means the software used for the previous version of the product is incompatible with the new product, and the software version shall be upgraded for the use of the new product. X – Minor number, indicating the minor revision of the chip product. If this number changes, it means the software used for the previous version of the product is compatible with the new product, and there is no need to upgrade the software. The vM.X scheme replaces previously used chip revision schemes, including ECOx numbers, Vxxx, and other formats if any. Primary Identification Methods eFuse Bits The chip revision is encoded using two eFuse fields: EFUSE_RD_MAC_SPI_SYS_5_REG[25:23] EFUSE_RD_MAC_SPI_SYS_3_REG[20:18] Table 1 Chip Revision Identification by eFuse Bits eFuse Bit Chip Revision v0.0 v0.1 v0.2 v0.3 v0.4 v1.1 Major Number EFUSE_RD_MAC_SPI_SYS_5_REG[25] 0 0 0 0 0 0 EFUSE_RD_MAC_SPI_SYS_5_REG[24] 0 0 0 0 0 1 Minor Number EFUSE_RD_MAC_SPI_SYS_5_REG[23] 0 0 0 0 0 0 EFUSE_RD_MAC_SPI_SYS_3_REG[20] 0 0 0 0 1 0 EFUSE_RD_MAC_SPI_SYS_3_REG[19] 0 0 1 1 0 0 EFUSE_RD_MAC_SPI_SYS_3_REG[18] 0 1 0 1 0 1 Chip Marking Espressif Tracking Information line in chip marking Figure 1 Chip Marking Diagram Table 2 Chip Revision Identification by Silk Print Chip Revision Espressif Tracking Information v0.0 X A XXXXXXXX v0.1 X B XXXXXXXX v0.2 X C XXXXXXXX v0.3 X D XXXXXXXX v0.4 X E XXXXXXXX v1.1 X H XXXXXXXX Module Marking Specification Identifier line in module marking Figure 2 Module Marking Diagram Table 3 Chip Revision Identification by Module Marking Chip Revision Specification Identifier 1 v0.0 — v0.1 — v0.2 — v0.3 XX XXXX v0.4 M4 XXXX v1.1 MH XXXX 1 Missing specification identifier “—” means modules with this chip revision are not mass produced. Additional Identification Methods Date Code Some errors in the chip product don’t need to be fixed at the silicon level, or in other words in a new chip revision. In this case, the chip may be identified by Date Code in chip marking (see Chip Marking). For more information, please refer to ESP32-C3 Chip Packaging Information > Chip Silk Marking. PW Number Modules built around the chip