1/2Compatibility AdvisoryTitleCompatibility Advisory for Chip Revision Numbering SchemeIssue date2022/09/29Advisory NumberAR2022-005Serial NumberNAVersionv1.0IntroductionEspressif is introducing vM.X numbering scheme to indicate chip revisions.M – Major number, indicating the major revision of the chip product. If thisnumber changes, it means the software used for the previous version of theproduct is incompatible with the new product, and the software version shall beupgraded for the use of the new product.X – Minor number, indicating the minor revision of the chip product. If thisnumber changes, it means the software used for the previous version of theproduct is compatible with the new product, and there is no need to upgrade thesoftware.The vM.X scheme replaces previously used chip revision schemes, includingECOx numbers, Vxxx, and other formats if any.Mapping Between Previously Used Schemes and vM.X SchemeThe table below shows the mapping between previously used chip revisionschemes, their identification in ESP-IDF logs, and the vM.X scheme.Chip SeriesPreviously UsedSchemesPrevious Identificationin ESP-IDF LogsvM.XESP32V00v0.0ECO, V11v1.0ECO, V33v3.0 2/2Chip SeriesPreviously UsedSchemesPrevious Identificationin ESP-IDF LogsvM.XESP32-S2n/a0v0.0ECO11v1.0ESP32-C3Chip Revision 33v0.3Chip Revision 44v0.4ESP32-S3V0010 (this is a bug in ESP-IDF logs)v0.1V002n/av0.2Identification of Chip RevisionsFor chip products, chip revision may be identified by two methods:1. Programmatically reading content of specific registers and eFuses2. Visually checking chip markingBoth methods are covered in the Chip Errata documents, for example,ESP32Series SoC Errata. They are also described in the specific PCN for chip revisionupgrade, for example, PCN for Upgrade Chip Revision of ESP32-S3 SeriesProducts.For module products that are based on chips, chip revision may be identified bymodule marking, which is described in the specific PCN for chip revisionupgrade, for example, PCN for Upgrade Chip Revision of ESP32-S3 SeriesProducts.Anticipated ImpactChip Errata update: ESP32 Series SoC Errata will be updated by replacingECOx numbers with the vM.X scheme.Web content update: Previously used chip revision schemes onwww.espressif.com will be updated to the vM.X scheme.The change of chip revision numbering scheme does not affect product form, fit,function, or reliability.ContactIf you have any questions, please contact Espressif.